mirror of
https://github.com/samueldr/wip-pinebook-pro.git
synced 2024-11-30 06:49:43 +01:00
506 lines
15 KiB
Diff
506 lines
15 KiB
Diff
From 1d0ac5b866e97ae591096d63fc6f145d127d1255 Mon Sep 17 00:00:00 2001
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From: Arnaud Patard <arnaud.patard@rtp-net.org>
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Date: Mon, 27 Jul 2020 19:22:31 -0400
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Subject: [PATCH 1/7] drivers/video/rockchip/rk_vop.c: Use endpoint compatible
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string to find VOP mode
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The current code is using an hard coded enum and the of node reg value of
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endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order
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is different between rk3288, rk3399 vop little, rk3399 vop big.
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A possible solution would be to make sure that the rk3288.dtsi and
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rk3399.dtsi files have "expected" reg value or an other solution is
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to find the kind of endpoint by comparing the endpoint compatible value.
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This patch is implementing the more flexible second solution.
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Origin: http://people.hupstream.com/~rtp/pbp/20200727/dts_vop_mode.patch
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Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
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---
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.../include/asm/arch-rockchip/vop_rk3288.h | 15 +----------
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drivers/video/rockchip/rk_vop.c | 25 +++++++++++++++++--
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2 files changed, 24 insertions(+), 16 deletions(-)
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diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
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index 872a158b714..bf19e059977 100644
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--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
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+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
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@@ -85,26 +85,13 @@ enum {
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LB_RGB_1280X8 = 0x5
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};
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-#if defined(CONFIG_ROCKCHIP_RK3399)
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enum vop_modes {
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VOP_MODE_EDP = 0,
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VOP_MODE_MIPI,
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VOP_MODE_HDMI,
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- VOP_MODE_MIPI1,
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- VOP_MODE_DP,
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- VOP_MODE_NONE,
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-};
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-#else
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-enum vop_modes {
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- VOP_MODE_EDP = 0,
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- VOP_MODE_HDMI,
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VOP_MODE_LVDS,
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- VOP_MODE_MIPI,
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- VOP_MODE_NONE,
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- VOP_MODE_AUTO_DETECT,
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- VOP_MODE_UNKNOWN,
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+ VOP_MODE_DP,
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};
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-#endif
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/* VOP_VERSION_INFO */
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#define M_FPGA_VERSION (0xffff << 16)
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diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
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index 9032eb430e7..6cd4ccc97a0 100644
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--- a/drivers/video/rockchip/rk_vop.c
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+++ b/drivers/video/rockchip/rk_vop.c
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@@ -235,12 +235,11 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node)
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struct clk clk;
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enum video_log2_bpp l2bpp;
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ofnode remote;
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+ const char *compat;
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debug("%s(%s, %lu, %s)\n", __func__,
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dev_read_name(dev), fbbase, ofnode_get_name(ep_node));
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- vop_id = ofnode_read_s32_default(ep_node, "reg", -1);
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- debug("vop_id=%d\n", vop_id);
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ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle);
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if (ret)
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return ret;
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@@ -282,6 +281,28 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node)
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if (disp)
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break;
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};
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+ compat = ofnode_get_property(remote, "compatible", NULL);
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+ if (!compat) {
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+ debug("%s(%s): Failed to find compatible property\n",
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+ __func__, dev_read_name(dev));
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+ return -EINVAL;
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+ }
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+ if (strstr(compat, "edp")) {
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+ vop_id = VOP_MODE_EDP;
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+ } else if (strstr(compat, "mipi")) {
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+ vop_id = VOP_MODE_MIPI;
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+ } else if (strstr(compat, "hdmi")) {
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+ vop_id = VOP_MODE_HDMI;
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+ } else if (strstr(compat, "cdn-dp")) {
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+ vop_id = VOP_MODE_DP;
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+ } else if (strstr(compat, "lvds")) {
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+ vop_id = VOP_MODE_LVDS;
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+ } else {
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+ debug("%s(%s): Failed to find vop mode for %s\n",
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+ __func__, dev_read_name(dev), compat);
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+ return -EINVAL;
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+ }
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+ debug("vop_id=%d\n", vop_id);
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disp_uc_plat = dev_get_uclass_platdata(disp);
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debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat);
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--
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2.25.4
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From 39ea1f49c03ef6eaa4305f8d1bcea46c08d8a1a4 Mon Sep 17 00:00:00 2001
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From: Arnaud Patard <arnaud.patard@rtp-net.org>
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Date: Mon, 27 Jul 2020 19:23:24 -0400
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Subject: [PATCH 2/7] drivers/video/rockchip/rk_edp.c: Add rk3399 support
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According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP
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support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399
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eDP IPs are nearly the same, the difference is in the grf register
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(SOC_CON6 versus SOC_CON20). So, change the code to use the right
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register on each IP.
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The clocks don't seem to be the same, the eDP clock is not at index 1
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on rk3399, so don't try changing the clock at index 1 to rate 0 on
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rk3399.
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Origin: http://people.hupstream.com/~rtp/pbp/20200727/rk_edp_rk3399.patch
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Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
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---
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.../include/asm/arch-rockchip/edp_rk3288.h | 5 +-
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drivers/video/rockchip/rk_edp.c | 85 ++++++++++++++-----
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2 files changed, 68 insertions(+), 22 deletions(-)
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diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
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index 105a335daba..c861f0eab18 100644
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--- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
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+++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
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@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00);
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#define PD_CH0 (0x1 << 0)
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/* pll_reg_1 */
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-#define REF_CLK_24M (0x1 << 1)
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-#define REF_CLK_27M (0x0 << 1)
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+#define REF_CLK_24M (0x1 << 0)
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+#define REF_CLK_27M (0x0 << 0)
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+#define REF_CLK_MASK (0x1 << 0)
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/* line_map */
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#define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
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diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
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index 000bd481408..1b2f5f706d5 100644
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--- a/drivers/video/rockchip/rk_edp.c
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+++ b/drivers/video/rockchip/rk_edp.c
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@@ -17,11 +17,10 @@
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/clock.h>
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+#include <asm/arch-rockchip/hardware.h>
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#include <asm/arch-rockchip/edp_rk3288.h>
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#include <asm/arch-rockchip/grf_rk3288.h>
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-#include <asm/arch-rockchip/hardware.h>
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-#include <dt-bindings/clock/rk3288-cru.h>
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-#include <linux/delay.h>
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+#include <asm/arch-rockchip/grf_rk3399.h>
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#define MAX_CR_LOOP 5
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#define MAX_EQ_LOOP 5
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@@ -37,18 +36,42 @@ static const char * const pre_emph_names[] = {
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#define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_1200
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#define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPHASIS_9_5
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+#define RK3288_GRF_SOC_CON6 0x025c
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+#define RK3288_GRF_SOC_CON12 0x0274
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+#define RK3399_GRF_SOC_CON20 0x6250
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+#define RK3399_GRF_SOC_CON25 0x6264
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+
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+enum rockchip_dp_types {
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+ RK3288_DP = 0,
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+ RK3399_EDP
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+};
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+
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+struct rockchip_dp_data {
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+ unsigned long reg_vop_big_little;
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+ unsigned long reg_vop_big_little_sel;
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+ unsigned long reg_ref_clk_sel;
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+ unsigned long ref_clk_sel_bit;
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+ enum rockchip_dp_types chip_type;
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+};
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+
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struct rk_edp_priv {
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struct rk3288_edp *regs;
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- struct rk3288_grf *grf;
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+ void *grf;
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struct udevice *panel;
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struct link_train link_train;
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u8 train_set[4];
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};
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-static void rk_edp_init_refclk(struct rk3288_edp *regs)
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+static void rk_edp_init_refclk(struct rk3288_edp *regs, enum rockchip_dp_types chip_type)
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{
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writel(SEL_24M, ®s->analog_ctl_2);
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- writel(REF_CLK_24M, ®s->pll_reg_1);
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+ u32 reg;
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+
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+ reg = REF_CLK_24M;
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+ if (chip_type == RK3288_DP)
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+ reg ^= REF_CLK_MASK;
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+ writel(reg, ®s->pll_reg_1);
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+
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writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US |
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V2L_CUR_SEL_1MA, ®s->pll_reg_2);
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@@ -1023,6 +1046,8 @@ static int rk_edp_probe(struct udevice *dev)
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struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
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struct rk_edp_priv *priv = dev_get_priv(dev);
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struct rk3288_edp *regs = priv->regs;
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+ struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev);
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+
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struct clk clk;
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int ret;
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@@ -1037,16 +1062,17 @@ static int rk_edp_probe(struct udevice *dev)
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int vop_id = uc_plat->source_id;
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debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id);
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- ret = clk_get_by_index(dev, 1, &clk);
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- if (ret >= 0) {
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- ret = clk_set_rate(&clk, 0);
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- clk_free(&clk);
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- }
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- if (ret) {
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- debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret);
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- return ret;
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+ if (edp_data->chip_type == RK3288_DP) {
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+ ret = clk_get_by_index(dev, 1, &clk);
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+ if (ret >= 0) {
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+ ret = clk_set_rate(&clk, 0);
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+ clk_free(&clk);
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+ }
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+ if (ret) {
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+ debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret);
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+ return ret;
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+ }
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}
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-
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ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
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if (ret >= 0) {
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ret = clk_set_rate(&clk, 192000000);
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@@ -1059,15 +1085,17 @@ static int rk_edp_probe(struct udevice *dev)
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}
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/* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */
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- rk_setreg(&priv->grf->soc_con12, 1 << 4);
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+ rk_setreg(priv->grf + edp_data->reg_ref_clk_sel,
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+ edp_data->ref_clk_sel_bit);
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/* select epd signal from vop0 or vop1 */
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- rk_clrsetreg(&priv->grf->soc_con6, (1 << 5),
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- (vop_id == 1) ? (1 << 5) : (0 << 5));
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+ rk_clrsetreg(priv->grf + edp_data->reg_vop_big_little,
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+ edp_data->reg_vop_big_little_sel,
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+ (vop_id == 1) ? edp_data->reg_vop_big_little_sel : 0);
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rockchip_edp_wait_hpd(priv);
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- rk_edp_init_refclk(regs);
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+ rk_edp_init_refclk(regs, edp_data->chip_type);
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rk_edp_init_interrupt(regs);
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rk_edp_enable_sw_function(regs);
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ret = rk_edp_init_analog_func(regs);
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@@ -1083,8 +1111,25 @@ static const struct dm_display_ops dp_rockchip_ops = {
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.enable = rk_edp_enable,
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};
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+static const struct rockchip_dp_data rk3399_edp = {
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+ .reg_vop_big_little = RK3399_GRF_SOC_CON20,
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+ .reg_vop_big_little_sel = BIT(5),
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+ .reg_ref_clk_sel = RK3399_GRF_SOC_CON25,
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+ .ref_clk_sel_bit = BIT(11),
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+ .chip_type = RK3399_EDP,
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+};
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+
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+static const struct rockchip_dp_data rk3288_dp = {
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+ .reg_vop_big_little = RK3288_GRF_SOC_CON6,
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+ .reg_vop_big_little_sel = BIT(5),
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+ .reg_ref_clk_sel = RK3288_GRF_SOC_CON12,
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+ .ref_clk_sel_bit = BIT(4),
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+ .chip_type = RK3288_DP,
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+};
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+
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static const struct udevice_id rockchip_dp_ids[] = {
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- { .compatible = "rockchip,rk3288-edp" },
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+ { .compatible = "rockchip,rk3288-edp", .data = (ulong)&rk3288_dp },
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+ { .compatible = "rockchip,rk3399-edp", .data = (ulong)&rk3399_edp },
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{ }
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};
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--
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2.25.4
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From 3f9f4ba5476972011794e7023dd0f5a2db1abede Mon Sep 17 00:00:00 2001
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From: Arnaud Patard <arnaud.patard@rtp-net.org>
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Date: Mon, 27 Jul 2020 19:23:27 -0400
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Subject: [PATCH 3/7] rk3399-pinebook-pro-u-boot.dtsi: Enable edp
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- uboot rockchip edp code is looking for a rockchip,panel property
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for the edp dts node, so add it.
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Origin: http://people.hupstream.com/~rtp/pbp/20200727/update_pinebook_pro_uboot_dtsi.patch
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Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
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---
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arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
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index 1a2e24d3ef5..f0b58909a4b 100644
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--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
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+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
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@@ -41,3 +41,7 @@
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&vdd_log {
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regulator-init-microvolt = <950000>;
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};
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+
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+&edp {
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+ rockchip,panel = <&edp_panel>;
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+};
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--
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2.25.4
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From 9ae9e65232c4f810567bced0f04111dbadfad287 Mon Sep 17 00:00:00 2001
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From: Arnaud Patard <arnaud.patard@rtp-net.org>
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Date: Mon, 27 Jul 2020 19:23:30 -0400
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Subject: [PATCH 4/7] PBP: Fix panel reset
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On warm reset, the pinebook pro panel is not working correctly.
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The issue is not yet debugged so, for now, this hack seems to be
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enough. It toggles the GPIO1_C6 gpio [ LCDVCC_EN signal in the
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schematics ] used by the vcc3v3_panel regulator.
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There's no gpio_request, since the gpio is already in use at this
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stage, so it can only fail.
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Origin: http://people.hupstream.com/~rtp/pbp/20200727/hack-reset.patch
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---
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board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c | 9 +++++++++
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1 file changed, 9 insertions(+)
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diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
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index 516292aaa59..6b8376d6cd9 100644
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--- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
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+++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
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@@ -7,9 +7,12 @@
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#include <common.h>
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#include <dm.h>
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#include <syscon.h>
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+#include <linux/delay.h>
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+#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/grf_rk3399.h>
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+#include <asm/arch-rockchip/gpio.h>
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#include <asm/arch-rockchip/hardware.h>
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#include <asm/arch-rockchip/misc.h>
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#include <power/regulator.h>
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@@ -59,6 +62,7 @@ int misc_init_r(void)
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const u32 cpuid_length = 0x10;
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u8 cpuid[cpuid_length];
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int ret;
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+ unsigned int gpio;
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setup_iodomain();
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@@ -70,6 +74,11 @@ int misc_init_r(void)
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if (ret)
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return ret;
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+ gpio_lookup_name("B22", NULL, NULL, &gpio);
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+ gpio_direction_output(gpio, 0);
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+ mdelay(500);
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+ gpio_direction_output(gpio, 1);
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+
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return ret;
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}
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#endif
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--
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2.25.4
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From 3a46df81e1b59695e44cae08004ce77b70fbdd46 Mon Sep 17 00:00:00 2001
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From: Arnaud Patard <arnaud.patard@rtp-net.org>
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Date: Mon, 27 Jul 2020 19:23:42 -0400
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Subject: [PATCH 5/7] SPL malloc() before relocation used 0x22d0 bytes (8 KB)
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spl_init
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Trying to boot from BOOTROM
|
|
Returning to boot ROM...
|
|
spl_early_init
|
|
pmic@1b: ret=-6
|
|
i2c@ff3c0000: ret=-6
|
|
dm_scan_fdt() failed: -6
|
|
dm_extended_scan_dt() failed: -6
|
|
dm_init_and_scan() returned error -6
|
|
spl_early_init() failed: -6
|
|
|
|
Origin: http://people.hupstream.com/~rtp/pbp/20200727/pmic-dm-reloc.patch
|
|
---
|
|
arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ++--
|
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
|
index f0b58909a4b..0f8879c4ca3 100644
|
|
--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
|
+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
|
@@ -20,9 +20,9 @@
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
-&rk808 {
|
|
+/*&rk808 {
|
|
u-boot,dm-pre-reloc;
|
|
-};
|
|
+};*/
|
|
|
|
&sdhci {
|
|
max-frequency = <25000000>;
|
|
--
|
|
2.25.4
|
|
|
|
|
|
From 51533b5a9b9963c05c2ddd21aee99b08adb8b48a Mon Sep 17 00:00:00 2001
|
|
From: Arnaud Patard <arnaud.patard@rtp-net.org>
|
|
Date: Mon, 27 Jul 2020 19:23:49 -0400
|
|
Subject: [PATCH 6/7] rk3399-pinebook-pro-u-boot.dts: "disable_cdp_dp.patch"
|
|
|
|
Origin: http://people.hupstream.com/~rtp/pbp/20200727/disable_cdp_dp.patch
|
|
---
|
|
arch/arm/dts/rk3399-pinebook-pro.dts | 4 ++--
|
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts
|
|
index 294d21bf45f..4e2dd140841 100644
|
|
--- a/arch/arm/dts/rk3399-pinebook-pro.dts
|
|
+++ b/arch/arm/dts/rk3399-pinebook-pro.dts
|
|
@@ -372,9 +372,9 @@
|
|
};
|
|
};
|
|
|
|
-&cdn_dp {
|
|
+/*&cdn_dp {
|
|
status = "okay";
|
|
-};
|
|
+};*/
|
|
|
|
&cpu_b0 {
|
|
cpu-supply = <&vdd_cpu_b>;
|
|
--
|
|
2.25.4
|
|
|
|
|
|
From cf24efba24a7aae0596be03487f77fe25238381e Mon Sep 17 00:00:00 2001
|
|
From: Arnaud Patard <arnaud.patard@rtp-net.org>
|
|
Date: Mon, 27 Jul 2020 19:23:52 -0400
|
|
Subject: [PATCH 7/7] drivers/video/rockchip/rk_vop.c: Reserve efi fb memory
|
|
|
|
When booting with EFI and graphics, the memory used for framebuffer
|
|
has to be reserved, otherwise it may leads to kernel memory
|
|
overwrite.
|
|
|
|
Origin: http://people.hupstream.com/~rtp/pbp/20200727/rk_vop_reserve_fb_memory.patch
|
|
|
|
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
|
|
---
|
|
drivers/video/rockchip/rk_vop.c | 9 +++++++++
|
|
1 file changed, 9 insertions(+)
|
|
|
|
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
|
|
index 6cd4ccc97a0..fe5ff977d7e 100644
|
|
--- a/drivers/video/rockchip/rk_vop.c
|
|
+++ b/drivers/video/rockchip/rk_vop.c
|
|
@@ -20,6 +20,8 @@
|
|
#include <asm/arch-rockchip/vop_rk3288.h>
|
|
#include <dm/device-internal.h>
|
|
#include <dm/uclass-internal.h>
|
|
+#include <efi.h>
|
|
+#include <efi_loader.h>
|
|
#include <linux/bitops.h>
|
|
#include <linux/err.h>
|
|
#include <power/regulator.h>
|
|
@@ -394,6 +396,13 @@ int rk_vop_probe(struct udevice *dev)
|
|
if (!(gd->flags & GD_FLG_RELOC))
|
|
return 0;
|
|
|
|
+ plat->base = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - plat->size;
|
|
+
|
|
+#ifdef CONFIG_EFI_LOADER
|
|
+ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base);
|
|
+ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE);
|
|
+#endif
|
|
+
|
|
priv->regs = (struct rk3288_vop *)dev_read_addr(dev);
|
|
|
|
/*
|
|
--
|
|
2.25.4
|
|
|