From 1a01021c9361c4e017cb5b032300f5555c393710 Mon Sep 17 00:00:00 2001 From: dhivael Date: Sat, 11 Jan 2020 15:04:46 +0100 Subject: [PATCH 3/6] rk3399: light pinebook power and standby leds during early boot this is a hack, but it works for now. --- arch/arm/mach-rockchip/rk3399/rk3399.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 863024d0710..cf37129d557 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -15,6 +15,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -115,8 +117,8 @@ void board_debug_uart_init(void) struct rk3399_grf_regs * const grf = (void *)GRF_BASE; #ifdef CONFIG_TARGET_CHROMEBOOK_BOB struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; - struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; #endif + struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) /* Enable early UART0 on the RK3399 */ @@ -149,6 +151,14 @@ void board_debug_uart_init(void) spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL); #endif /* CONFIG_TARGET_CHROMEBOOK_BOB */ + { + // set GPIO0_A2/B3 to GPIO_ACTIVE_HIGH + // set GPIO0_A2/B3 to OUTPUT + int mask = (1UL << RK_PA2) | (1UL << RK_PB3); + setbits_le32(&gpio->swport_dr, mask); + setbits_le32(&gpio->swport_ddr, mask); + } + /* Enable early UART2 channel C on the RK3399 */ rk_clrsetreg(&grf->gpio4c_iomux, GRF_GPIO4C3_SEL_MASK, -- 2.23.1