diff --git a/kernel/lts/default.nix b/kernel/lts/default.nix new file mode 100644 index 0000000..6a2f0b4 --- /dev/null +++ b/kernel/lts/default.nix @@ -0,0 +1,37 @@ +{ pkgs, lib, linux_5_4, kernelPatches, ... } @ args: + +linux_5_4.override({ + # The way the linux kernel is composed, kernelPatches will end up filled-in twice... + # Not entirely sure why. + kernelPatches = lib.lists.unique (kernelPatches ++ [ + pkgs.kernelPatches.bridge_stp_helper + pkgs.kernelPatches.request_key_helper + pkgs.kernelPatches.export_kernel_fpu_functions."5.3" + { + name = "pinebookpro-5.4-lts.patch"; + patch = ./pinebookpro-5.4-lts.patch; + } + { + name = "pinebookpro-config-fixes"; + patch = null; + extraConfig = '' + PCIE_ROCKCHIP y + PCIE_ROCKCHIP_HOST y + PCIE_DW_PLAT y + PCIE_DW_PLAT_HOST y + PHY_ROCKCHIP_PCIE y + PHY_ROCKCHIP_INNO_HDMI y + PHY_ROCKCHIP_DP y + ROCKCHIP_MBOX y + STAGING_MEDIA y + VIDEO_HANTRO m + VIDEO_HANTRO_ROCKCHIP y + USB_DWC2_PCI y + ROCKCHIP_LVDS y + ROCKCHIP_RGB y + ''; + } + ]); +}) +// +(args.argsOverride or {}) diff --git a/kernel/lts/pinebookpro-5.4-lts.patch b/kernel/lts/pinebookpro-5.4-lts.patch new file mode 100644 index 0000000..eb94181 --- /dev/null +++ b/kernel/lts/pinebookpro-5.4-lts.patch @@ -0,0 +1,11963 @@ +From 60b75cb01809e3278b4ef95955b76ffef87facb3 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 5 Nov 2019 18:34:02 +0100 +Subject: [PATCH 01/98] panel-simple: Add support for BOE NV140FHM-N49 Full HD + eDP panel + +This panel is used in the Pinebook Pro. + +Signed-off-by: Tobias Schramm +--- + drivers/gpu/drm/panel/panel-simple.c | 34 ++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) + +diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c +index 28fa6ba7b767..cce539b99c35 100644 +--- a/drivers/gpu/drm/panel/panel-simple.c ++++ b/drivers/gpu/drm/panel/panel-simple.c +@@ -1033,6 +1033,36 @@ static const struct panel_desc boe_nv101wxmn51 = { + }, + }; + ++static const struct drm_display_mode boe_nv140fhmn49_modes[] = { ++ { ++ .clock = 150000, ++ .hdisplay = 1920, ++ .hsync_start = 1920 + 48, ++ .hsync_end = 1920 + 48 + 32, ++ .htotal = 1920 + 48 + 32 + 80, ++ .vdisplay = 1080, ++ .vsync_start = 1080 + 3, ++ .vsync_end = 1080 + 3 + 5, ++ .vtotal = 1080 + 3 + 5 + 24, ++ .vrefresh = 60, ++ }, ++}; ++ ++static const struct panel_desc boe_nv140fhmn49 = { ++ .modes = boe_nv140fhmn49_modes, ++ .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), ++ .bpc = 8, ++ .size = { ++ .width = 309, ++ .height = 174, ++ }, ++ .delay = { ++ .prepare = 210, ++ .enable = 50, ++ .unprepare = 160, ++ }, ++}; ++ + static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { + .clock = 9000, + .hdisplay = 480, +@@ -3138,6 +3168,9 @@ static const struct of_device_id platform_of_match[] = { + }, { + .compatible = "boe,nv101wxmn51", + .data = &boe_nv101wxmn51, ++ }, { ++ .compatible = "boe,nv140fhmn49", ++ .data = &boe_nv140fhmn49, + }, { + .compatible = "cdtech,s043wq26h-ct7", + .data = &cdtech_s043wq26h_ct7, +@@ -3430,6 +3463,7 @@ static struct platform_driver panel_simple_platform_driver = { + .driver = { + .name = "panel-simple", + .of_match_table = platform_of_match, ++ .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = panel_simple_platform_probe, + .remove = panel_simple_platform_remove, +-- +2.25.4 + + +From 0888fd42471c9aa3535bf6d313ee77b1cbffde46 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 5 Nov 2019 18:38:32 +0100 +Subject: [PATCH 02/98] cw2015: Add support for the CellWise cw2015 fuel gauge + +The cw2015 is a shuntless single cell lithium battery fuel gauage. + +Signed-off-by: Tobias Schramm +--- + drivers/power/supply/Kconfig | 7 + + drivers/power/supply/Makefile | 1 + + drivers/power/supply/cw2015_battery.c | 949 ++++++++++++++++++++++++++ + include/linux/power/cw2015_battery.h | 122 ++++ + 4 files changed, 1079 insertions(+) + create mode 100644 drivers/power/supply/cw2015_battery.c + create mode 100644 include/linux/power/cw2015_battery.h + +diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig +index c84a7b1caeb6..e1f4504612a3 100644 +--- a/drivers/power/supply/Kconfig ++++ b/drivers/power/supply/Kconfig +@@ -116,6 +116,13 @@ config BATTERY_CPCAP + Say Y here to enable support for battery on Motorola + phones and tablets such as droid 4. + ++config BATTERY_CW2015 ++ bool "CW2015 Battery driver" ++ default n ++ help ++ If you say yes here you will get support for the battery of CW2015. ++ This driver can give support for CW2015 Battery Interface. ++ + config BATTERY_DS2760 + tristate "DS2760 battery driver (HP iPAQ & others)" + depends on W1 +diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile +index 6c7da920ea83..69727a10e835 100644 +--- a/drivers/power/supply/Makefile ++++ b/drivers/power/supply/Makefile +@@ -24,6 +24,7 @@ obj-$(CONFIG_BATTERY_ACT8945A) += act8945a_charger.o + obj-$(CONFIG_BATTERY_AXP20X) += axp20x_battery.o + obj-$(CONFIG_CHARGER_AXP20X) += axp20x_ac_power.o + obj-$(CONFIG_BATTERY_CPCAP) += cpcap-battery.o ++obj-$(CONFIG_BATTERY_CW2015) += cw2015_battery.o + obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o + obj-$(CONFIG_BATTERY_DS2780) += ds2780_battery.o + obj-$(CONFIG_BATTERY_DS2781) += ds2781_battery.o +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +new file mode 100644 +index 000000000000..4da65c606338 +--- /dev/null ++++ b/drivers/power/supply/cw2015_battery.c +@@ -0,0 +1,949 @@ ++/* ++ * Fuel gauge driver for CellWise 2013 / 2015 ++ * ++ * Copyright (C) 2012, RockChip ++ * Copyright (C) 2019, Tobias Schramm ++ * ++ * Authors: xuhuicong ++ * Authors: Tobias Schramm ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++static int dbg_enable; ++module_param_named(dbg_level, dbg_enable, int, 0644); ++ ++#define cw_printk(args...) \ ++ do { \ ++ if (dbg_enable) { \ ++ pr_info(args); \ ++ } \ ++ } while (0) ++ ++static int cw_read(struct i2c_client *client, u8 reg, u8 buf[]) ++{ ++ return i2c_smbus_read_i2c_block_data(client, reg, 1, buf); ++} ++ ++static int cw_write(struct i2c_client *client, u8 reg, u8 const buf[]) ++{ ++ return i2c_smbus_write_i2c_block_data(client, reg, 1, &buf[0]); ++} ++ ++static int cw_read_word(struct i2c_client *client, u8 reg, u8 buf[]) ++{ ++ return i2c_smbus_read_i2c_block_data(client, reg, 2, buf); ++} ++ ++int cw_update_config_info(struct cw_battery *cw_bat) ++{ ++ int ret; ++ u8 reg_val; ++ u8 i; ++ u8 reset_val; ++ ++ cw_printk("[FGADC] test config_info = 0x%x\n", ++ cw_bat->plat_data.cw_bat_config_info[0]); ++ ++ /* make sure no in sleep mode */ ++ ret = cw_read(cw_bat->client, CW2015_REG_MODE, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ reset_val = reg_val; ++ if ((reg_val & CW2015_MODE_SLEEP_MASK) == CW2015_MODE_SLEEP) { ++ dev_err(&cw_bat->client->dev, ++ "device in sleep mode, cannot update battery info\n"); ++ return -1; ++ } ++ ++ /* update new battery info */ ++ for (i = 0; i < CW2015_SIZE_BATINFO; i++) { ++ ret = ++ cw_write(cw_bat->client, CW2015_REG_BATINFO + i, ++ (u8 *)&cw_bat->plat_data.cw_bat_config_info[i]); ++ ++ if (ret < 0) ++ return ret; ++ } ++ ++ reg_val |= CW2015_CONFIG_UPDATE_FLG; /* set UPDATE_FLAG */ ++ reg_val &= ~CW2015_MASK_ATHD; /* clear ATHD */ ++ reg_val |= CW2015_ATHD; /* set CW2015_ATHD */ ++ ret = cw_write(cw_bat->client, CW2015_REG_CONFIG, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ /* check 2015/cw2013 for CW2015_ATHD & update_flag */ ++ ret = cw_read(cw_bat->client, CW2015_REG_CONFIG, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ if (!(reg_val & CW2015_CONFIG_UPDATE_FLG)) { ++ dev_info(&cw_bat->client->dev, ++ "update flag for new battery info have not set..\n"); ++ } ++ ++ if ((reg_val & CW2015_MASK_ATHD) != CW2015_ATHD) ++ dev_info(&cw_bat->client->dev, "the new CW2015_ATHD have not set..\n"); ++ ++ /* reset */ ++ reset_val &= ~(CW2015_MODE_RESTART); ++ reg_val = reset_val | CW2015_MODE_RESTART; ++ ret = cw_write(cw_bat->client, CW2015_REG_MODE, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ msleep(10); ++ ret = cw_write(cw_bat->client, CW2015_REG_MODE, &reset_val); ++ if (ret < 0) ++ return ret; ++ ++ cw_printk("cw2015 update config success!\n"); ++ ++ return 0; ++} ++ ++static int cw_init(struct cw_battery *cw_bat) ++{ ++ int ret; ++ int i; ++ u8 reg_val = CW2015_MODE_SLEEP; ++ ++ if ((reg_val & CW2015_MODE_SLEEP_MASK) == CW2015_MODE_SLEEP) { ++ reg_val = CW2015_MODE_NORMAL; ++ ret = cw_write(cw_bat->client, CW2015_REG_MODE, ®_val); ++ if (ret < 0) ++ return ret; ++ } ++ ++ ret = cw_read(cw_bat->client, CW2015_REG_CONFIG, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ if ((reg_val & CW2015_MASK_ATHD) != CW2015_ATHD) { ++ dev_info(&cw_bat->client->dev, "the new CW2015_ATHD have not set\n"); ++ reg_val &= ~CW2015_MASK_ATHD; /* clear CW2015_ATHD */ ++ reg_val |= CW2015_ATHD; /* set CW2015_ATHD */ ++ ret = cw_write(cw_bat->client, CW2015_REG_CONFIG, ®_val); ++ if (ret < 0) ++ return ret; ++ } ++ ++ ret = cw_read(cw_bat->client, CW2015_REG_CONFIG, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ if (!(reg_val & CW2015_CONFIG_UPDATE_FLG)) { ++ cw_printk("update config flg is true, need update config\n"); ++ ret = cw_update_config_info(cw_bat); ++ if (ret < 0) { ++ dev_info(&cw_bat->client->dev, ++ "update flag for new battery info have not set\n"); ++ return ret; ++ } ++ } else { ++ for (i = 0; i < CW2015_SIZE_BATINFO; i++) { ++ ret = cw_read(cw_bat->client, (CW2015_REG_BATINFO + i), ++ ®_val); ++ if (ret < 0) ++ return ret; ++ ++ if (cw_bat->plat_data.cw_bat_config_info[i] != reg_val) ++ break; ++ } ++ ++ if (i != CW2015_SIZE_BATINFO) { ++ dev_info(&cw_bat->client->dev, ++ "update flag for new battery info have not set\n"); ++ ret = cw_update_config_info(cw_bat); ++ if (ret < 0) ++ return ret; ++ } ++ } ++ ++ for (i = 0; i < CW2015_READ_TRIES; i++) { ++ ret = cw_read(cw_bat->client, CW2015_REG_SOC, ®_val); ++ if (ret < 0) ++ return ret; ++ else if (reg_val <= 100) // SOC can't be more than 100 % ++ break; ++ msleep(120); ++ } ++ ++ if (i >= CW2015_READ_TRIES) { ++ reg_val = CW2015_MODE_SLEEP; ++ ret = cw_write(cw_bat->client, CW2015_REG_MODE, ®_val); ++ dev_info(&cw_bat->client->dev, "report battery capacity error"); ++ return -1; ++ } ++ ++ cw_printk("cw2015 init success!\n"); ++ return 0; ++} ++ ++static int check_charger_online(struct device *dev, void *data) { ++ struct device *cw_dev = data; ++ struct power_supply *supply = dev_get_drvdata(dev); ++ union power_supply_propval val; ++ ++ if (supply->desc->type == POWER_SUPPLY_TYPE_BATTERY) { ++ dev_dbg(cw_dev, "Skipping power supply %s since it is a battery\n", dev_name(dev)); ++ return 0; // Bail out, not a charger ++ } ++ if(!supply->desc->get_property(supply, POWER_SUPPLY_PROP_ONLINE, &val)) { ++ return val.intval; ++ } else { ++ dev_dbg(cw_dev, "Skipping power supply %s since it does not have an online property\n", dev_name(dev)); ++ } ++ return 0; ++} ++ ++#ifdef CONFIG_OF ++static int device_parent_match_of_node(struct device *dev, const void *np) { ++ while(dev) { ++ if(dev->of_node == np) { ++ return 1; ++ } ++ dev = dev->parent; ++ } ++ return 0; ++} ++#endif ++ ++static int get_charge_state(struct cw_battery *cw_bat) ++{ ++#ifdef CONFIG_OF ++ int i = 0, online = 0; ++ struct device_node* supply_of; ++ struct device *cw_dev = &cw_bat->client->dev; ++ if (!cw_dev->of_node) { ++ dev_info(cw_dev, "Charger does not have an of node, scanning all supplies\n"); ++#endif ++ return !!class_for_each_device(power_supply_class, NULL, cw_dev, check_charger_online); ++#ifdef CONFIG_OF ++ } ++ do { ++ struct device *supply_dev; ++ dev_dbg(cw_dev, "Scanning linked supplies of %s\n", cw_dev->of_node->name); ++ supply_of = of_parse_phandle(cw_dev->of_node, "power-supplies", i++); ++ if (!supply_of) { ++ dev_dbg(cw_dev, "Got empty of node, scan done\n"); ++ break; ++ } ++ dev_dbg(cw_dev, "Got power supply %s\n", supply_of->name); ++ supply_dev = class_find_device(power_supply_class, NULL, supply_of, device_parent_match_of_node); ++ if (supply_dev) { ++ online = check_charger_online(supply_dev, NULL); ++ dev_dbg(supply_dev, "Charger online: %d\n", online); ++ put_device(supply_dev); ++ } else { ++ dev_warn(cw_dev, "Failed to get device for device node %s\n", supply_of->name); ++ } ++ of_node_put(supply_of); ++ } while(!online); ++ return online; ++#endif ++} ++ ++static int cw_por(struct cw_battery *cw_bat) ++{ ++ int ret; ++ unsigned char reset_val; ++ ++ reset_val = CW2015_MODE_SLEEP; ++ ret = cw_write(cw_bat->client, CW2015_REG_MODE, &reset_val); ++ if (ret < 0) ++ return ret; ++ reset_val = CW2015_MODE_NORMAL; ++ msleep(20); ++ ret = cw_write(cw_bat->client, CW2015_REG_MODE, &reset_val); ++ if (ret < 0) ++ return ret; ++ ret = cw_init(cw_bat); ++ if (ret) ++ return ret; ++ return 0; ++} ++ ++static int cw_get_capacity(struct cw_battery *cw_bat) ++{ ++ int cw_capacity; ++ int ret; ++ unsigned char reg_val[2]; ++ ++ static int reset_loop; ++ static int charging_loop; ++ static int discharging_loop; ++ static int jump_flag; ++ static int charging_5_loop; ++ int sleep_cap; ++ ++ ret = cw_read_word(cw_bat->client, CW2015_REG_SOC, reg_val); ++ if (ret < 0) ++ return ret; ++ ++ cw_capacity = reg_val[0]; ++ ++ if ((cw_capacity < 0) || (cw_capacity > 100)) { ++ cw_printk("Error: cw_capacity = %d\n", cw_capacity); ++ reset_loop++; ++ if (reset_loop > ++ (CW2015_BATTERY_CAPACITY_ERROR / cw_bat->monitor_sec)) { ++ cw_por(cw_bat); ++ reset_loop = 0; ++ } ++ return cw_bat->capacity; ++ } else { ++ reset_loop = 0; ++ } ++ ++ /* case 1 : aviod swing */ ++ if (((cw_bat->charger_mode > 0) && ++ (cw_capacity <= cw_bat->capacity - 1) && ++ (cw_capacity > cw_bat->capacity - 9)) || ++ ((cw_bat->charger_mode == 0) && ++ (cw_capacity == (cw_bat->capacity + 1)))) { ++ if (!(cw_capacity == 0 && cw_bat->capacity <= 2)) ++ cw_capacity = cw_bat->capacity; ++ } ++ ++ /* case 2 : aviod no charge full */ ++ if ((cw_bat->charger_mode > 0) && ++ (cw_capacity >= 95) && (cw_capacity <= cw_bat->capacity)) { ++ cw_printk("Chaman join no charge full\n"); ++ charging_loop++; ++ if (charging_loop > ++ (CW2015_BATTERY_UP_MAX_CHANGE / cw_bat->monitor_sec)) { ++ cw_capacity = (cw_bat->capacity + 1) <= 100 ? ++ (cw_bat->capacity + 1) : 100; ++ charging_loop = 0; ++ jump_flag = 1; ++ } else { ++ cw_capacity = cw_bat->capacity; ++ } ++ } ++ ++ /* case 3 : avoid battery level jump to CW_BAT */ ++ if ((cw_bat->charger_mode == 0) && ++ (cw_capacity <= cw_bat->capacity) && ++ (cw_capacity >= 90) && (jump_flag == 1)) { ++ cw_printk("Chaman join no charge full discharging\n"); ++#ifdef CONFIG_PM ++ if (cw_bat->suspend_resume_mark == 1) { ++ cw_bat->suspend_resume_mark = 0; ++ sleep_cap = (cw_bat->after.tv_sec + ++ discharging_loop * ++ (cw_bat->monitor_sec / 1000)) / ++ (CW2015_BATTERY_DOWN_MAX_CHANGE / 1000); ++ cw_printk("sleep_cap = %d\n", sleep_cap); ++ ++ if (cw_capacity >= cw_bat->capacity - sleep_cap) { ++ return cw_capacity; ++ } else { ++ if (!sleep_cap) ++ discharging_loop = discharging_loop + ++ 1 + cw_bat->after.tv_sec / ++ (cw_bat->monitor_sec / 1000); ++ else ++ discharging_loop = 0; ++ cw_printk("discharging_loop = %d\n", ++ discharging_loop); ++ return cw_bat->capacity - sleep_cap; ++ } ++ } ++#endif ++ discharging_loop++; ++ if (discharging_loop > ++ (CW2015_BATTERY_DOWN_MAX_CHANGE / cw_bat->monitor_sec)) { ++ if (cw_capacity >= cw_bat->capacity - 1) ++ jump_flag = 0; ++ else ++ cw_capacity = cw_bat->capacity - 1; ++ ++ discharging_loop = 0; ++ } else { ++ cw_capacity = cw_bat->capacity; ++ } ++ } ++ ++ /* case 4 : avoid battery level is 0% when long time charging */ ++ if ((cw_bat->charger_mode > 0) && (cw_capacity == 0)) { ++ charging_5_loop++; ++ if (charging_5_loop > ++ CW2015_BATTERY_CHARGING_ZERO / cw_bat->monitor_sec) { ++ cw_por(cw_bat); ++ charging_5_loop = 0; ++ } ++ } else if (charging_5_loop != 0) { ++ charging_5_loop = 0; ++ } ++#ifdef CONFIG_PM ++ if (cw_bat->suspend_resume_mark == 1) ++ cw_bat->suspend_resume_mark = 0; ++#endif ++ return cw_capacity; ++} ++ ++static int cw_get_voltage(struct cw_battery *cw_bat) ++{ ++ int ret; ++ u8 reg_val[2]; ++ u16 value16, value16_1, value16_2, value16_3; ++ int voltage; ++ int res1, res2; ++ ++ ret = cw_read_word(cw_bat->client, CW2015_REG_VCELL, reg_val); ++ if (ret < 0) ++ return ret; ++ value16 = (reg_val[0] << 8) + reg_val[1]; ++ ++ ret = cw_read_word(cw_bat->client, CW2015_REG_VCELL, reg_val); ++ if (ret < 0) ++ return ret; ++ value16_1 = (reg_val[0] << 8) + reg_val[1]; ++ ++ ret = cw_read_word(cw_bat->client, CW2015_REG_VCELL, reg_val); ++ if (ret < 0) ++ return ret; ++ value16_2 = (reg_val[0] << 8) + reg_val[1]; ++ ++ if (value16 > value16_1) { ++ value16_3 = value16; ++ value16 = value16_1; ++ value16_1 = value16_3; ++ } ++ ++ if (value16_1 > value16_2) { ++ value16_3 = value16_1; ++ value16_1 = value16_2; ++ value16_2 = value16_3; ++ } ++ ++ if (value16 > value16_1) { ++ value16_3 = value16; ++ value16 = value16_1; ++ value16_1 = value16_3; ++ } ++ ++ voltage = value16_1 * 312 / 1024; ++ ++ if (cw_bat->plat_data.divider_res1 && ++ cw_bat->plat_data.divider_res2) { ++ res1 = cw_bat->plat_data.divider_res1; ++ res2 = cw_bat->plat_data.divider_res2; ++ voltage = voltage * (res1 + res2) / res2; ++ } else if (cw_bat->dual_battery) { ++ voltage = voltage * 2; ++ } ++ ++ dev_dbg(&cw_bat->client->dev, "the cw201x voltage=%d,reg_val=%x %x\n", ++ voltage, reg_val[0], reg_val[1]); ++ return voltage; ++} ++ ++/*This function called when get RRT from cw2015*/ ++static int cw_get_time_to_empty(struct cw_battery *cw_bat) ++{ ++ int ret; ++ u8 reg_val; ++ u16 value16; ++ ++ ret = cw_read(cw_bat->client, CW2015_REG_RRT_ALERT, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ value16 = reg_val; ++ ++ ret = cw_read(cw_bat->client, CW2015_REG_RRT_ALERT + 1, ®_val); ++ if (ret < 0) ++ return ret; ++ ++ value16 = ((value16 << 8) + reg_val) & CW2015_MASK_SOC; ++ return value16; ++} ++ ++static void cw_update_charge_status(struct cw_battery *cw_bat) ++{ ++ int cw_charger_mode; ++ ++ cw_charger_mode = get_charge_state(cw_bat); ++ if (cw_bat->charger_mode != cw_charger_mode) { ++ cw_bat->charger_mode = cw_charger_mode; ++ cw_bat->bat_change = 1; ++ if (cw_charger_mode) ++ cw_bat->charge_count++; ++ } ++} ++ ++static void cw_update_capacity(struct cw_battery *cw_bat) ++{ ++ int cw_capacity; ++ ++ cw_capacity = cw_get_capacity(cw_bat); ++ if ((cw_capacity >= 0) && (cw_capacity <= 100) && ++ (cw_bat->capacity != cw_capacity)) { ++ cw_bat->capacity = cw_capacity; ++ cw_bat->bat_change = 1; ++ } ++} ++ ++static void cw_update_vol(struct cw_battery *cw_bat) ++{ ++ int ret; ++ ++ ret = cw_get_voltage(cw_bat); ++ if ((ret >= 0) && (cw_bat->voltage != ret)) ++ cw_bat->voltage = ret; ++} ++ ++static void cw_update_status(struct cw_battery *cw_bat) ++{ ++ int status; ++ ++ if (cw_bat->charger_mode > 0) { ++ if (cw_bat->capacity >= 100) ++ status = POWER_SUPPLY_STATUS_FULL; ++ else ++ status = POWER_SUPPLY_STATUS_CHARGING; ++ } else { ++ status = POWER_SUPPLY_STATUS_DISCHARGING; ++ } ++ ++ if (cw_bat->status != status) { ++ cw_bat->status = status; ++ cw_bat->bat_change = 1; ++ } ++} ++ ++static void cw_update_time_to_empty(struct cw_battery *cw_bat) ++{ ++ int ret; ++ ++ ret = cw_get_time_to_empty(cw_bat); ++ if ((ret >= 0) && (cw_bat->time_to_empty != ret)) { ++ cw_bat->time_to_empty = ret; ++ cw_bat->bat_change = 1; ++ } ++} ++ ++static void cw_bat_work(struct work_struct *work) ++{ ++ struct delayed_work *delay_work; ++ struct cw_battery *cw_bat; ++ int ret; ++ u8 reg_val; ++ int i = 0; ++ ++ delay_work = container_of(work, struct delayed_work, work); ++ cw_bat = ++ container_of(delay_work, struct cw_battery, battery_delay_work); ++ ++ /* Add for battery swap start */ ++ ret = cw_read(cw_bat->client, CW2015_REG_MODE, ®_val); ++ if (ret < 0) { ++ cw_bat->bat_mode = MODE_VIRTUAL; ++ cw_bat->bat_change = 1; ++ } else { ++ if ((reg_val & CW2015_MODE_SLEEP_MASK) == CW2015_MODE_SLEEP) { ++ for (i = 0; i < 5; i++) { ++ if (cw_por(cw_bat) == 0) ++ break; ++ } ++ } ++ cw_update_capacity(cw_bat); ++ cw_update_vol(cw_bat); ++ cw_update_charge_status(cw_bat); ++ cw_update_status(cw_bat); ++ cw_update_time_to_empty(cw_bat); ++ } ++ /* Add for battery swap end */ ++ cw_printk("charger_mod = %d\n", cw_bat->charger_mode); ++ cw_printk("status = %d\n", cw_bat->status); ++ cw_printk("capacity = %d\n", cw_bat->capacity); ++ cw_printk("voltage = %d\n", cw_bat->voltage); ++ ++#ifdef CONFIG_PM ++ if (cw_bat->suspend_resume_mark == 1) ++ cw_bat->suspend_resume_mark = 0; ++#endif ++ ++ if (cw_bat->bat_change == 1) { ++ power_supply_changed(cw_bat->rk_bat); ++ cw_bat->bat_change = 0; ++ } ++ queue_delayed_work(cw_bat->battery_workqueue, ++ &cw_bat->battery_delay_work, ++ msecs_to_jiffies(cw_bat->monitor_sec)); ++} ++ ++static bool cw_battery_valid_time_to_empty(struct cw_battery *cw_bat) ++{ ++ return cw_bat->time_to_empty > 0 && cw_bat->time_to_empty < CW2015_MASK_SOC && ++ cw_bat->status == POWER_SUPPLY_STATUS_DISCHARGING; ++} ++ ++static int cw_battery_get_property(struct power_supply *psy, ++ enum power_supply_property psp, ++ union power_supply_propval *val) ++{ ++ int ret = 0; ++ struct cw_battery *cw_bat; ++ ++ cw_bat = power_supply_get_drvdata(psy); ++ switch (psp) { ++ case POWER_SUPPLY_PROP_CAPACITY: ++ val->intval = cw_bat->capacity; ++ if (cw_bat->bat_mode == MODE_VIRTUAL) ++ val->intval = CW2015_VIRTUAL_SOC; ++ break; ++ case POWER_SUPPLY_PROP_STATUS: ++ val->intval = cw_bat->status; ++ if (cw_bat->bat_mode == MODE_VIRTUAL) ++ val->intval = CW2015_VIRTUAL_STATUS; ++ break; ++ ++ case POWER_SUPPLY_PROP_HEALTH: ++ val->intval = POWER_SUPPLY_HEALTH_GOOD; ++ break; ++ case POWER_SUPPLY_PROP_PRESENT: ++ val->intval = cw_bat->voltage <= 0 ? 0 : 1; ++ if (cw_bat->bat_mode == MODE_VIRTUAL) ++ val->intval = CW2015_VIRTUAL_PRESET; ++ break; ++ ++ case POWER_SUPPLY_PROP_VOLTAGE_NOW: ++ val->intval = cw_bat->voltage * 1000; ++ if (cw_bat->bat_mode == MODE_VIRTUAL) ++ val->intval = CW2015_VIRTUAL_VOLTAGE * 1000; ++ break; ++ ++ case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW: ++ if (cw_battery_valid_time_to_empty(cw_bat)) { ++ val->intval = cw_bat->time_to_empty; ++ } else { ++ val->intval = 0; ++ } ++ if (cw_bat->bat_mode == MODE_VIRTUAL) ++ val->intval = CW2015_VIRTUAL_TIME2EMPTY; ++ break; ++ ++ case POWER_SUPPLY_PROP_TECHNOLOGY: ++ val->intval = POWER_SUPPLY_TECHNOLOGY_LION; ++ break; ++ ++ case POWER_SUPPLY_PROP_CHARGE_COUNTER: ++ val->intval = cw_bat->charge_count; ++ break; ++ ++ case POWER_SUPPLY_PROP_CHARGE_FULL: ++ val->intval = cw_bat->plat_data.design_capacity * 1000; ++ break; ++ ++ case POWER_SUPPLY_PROP_TEMP: ++ val->intval = CW2015_VIRTUAL_TEMPERATURE; ++ break; ++ ++ case POWER_SUPPLY_PROP_CURRENT_NOW: ++ if (cw_battery_valid_time_to_empty(cw_bat)) { ++ // calculate remaining capacity ++ val->intval = cw_bat->plat_data.design_capacity * 1000; ++ val->intval = val->intval * cw_bat->capacity / 100; ++ ++ // estimate current based on time to empty (in minutes) ++ val->intval = 60 * val->intval / cw_bat->time_to_empty; ++ } else { ++ val->intval = 0; ++ } ++ ++ if (cw_bat->bat_mode == MODE_VIRTUAL) ++ val->intval = CW2015_VIRTUAL_CURRENT; ++ break; ++ ++ default: ++ break; ++ } ++ return ret; ++} ++ ++static enum power_supply_property cw_battery_properties[] = { ++ POWER_SUPPLY_PROP_CAPACITY, ++ POWER_SUPPLY_PROP_STATUS, ++ POWER_SUPPLY_PROP_HEALTH, ++ POWER_SUPPLY_PROP_PRESENT, ++ POWER_SUPPLY_PROP_VOLTAGE_NOW, ++ POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, ++ POWER_SUPPLY_PROP_TECHNOLOGY, ++ POWER_SUPPLY_PROP_CHARGE_COUNTER, ++ POWER_SUPPLY_PROP_CHARGE_FULL, ++ POWER_SUPPLY_PROP_TEMP, ++ POWER_SUPPLY_PROP_CURRENT_NOW, ++}; ++ ++static const struct power_supply_desc cw2015_bat_desc = { ++ .name = "rk-bat", ++ .type = POWER_SUPPLY_TYPE_BATTERY, ++ .properties = cw_battery_properties, ++ .num_properties = ARRAY_SIZE(cw_battery_properties), ++ .get_property = cw_battery_get_property, ++}; ++ ++#ifdef CONFIG_OF ++static int cw2015_parse_dt(struct cw_battery *cw_bat) ++{ ++ struct device *dev = &cw_bat->client->dev; ++ struct device_node *node = dev->of_node; ++ struct property *prop; ++ int length; ++ u32 value; ++ int ret; ++ struct cw_bat_platform_data *data = &cw_bat->plat_data; ++ struct gpio_desc *hw_id0_io; ++ struct gpio_desc *hw_id1_io; ++ int hw_id0_val; ++ int hw_id1_val; ++ ++ if (!node) ++ return -ENODEV; ++ ++ memset(data, 0, sizeof(*data)); ++ ++ ret = of_property_read_u32(node, "hw_id_check", &value); ++ if (!ret && value) { ++ hw_id0_io = gpiod_get_optional(dev, "hw-id0", GPIOD_IN); ++ if (!hw_id0_io) ++ return -EINVAL; ++ if (IS_ERR(hw_id0_io)) ++ return PTR_ERR(hw_id0_io); ++ ++ hw_id0_val = gpiod_get_value(hw_id0_io); ++ gpiod_put(hw_id0_io); ++ ++ hw_id1_io = gpiod_get_optional(dev, "hw-id1", GPIOD_IN); ++ if (!hw_id1_io) ++ return -EINVAL; ++ if (IS_ERR(hw_id1_io)) ++ return PTR_ERR(hw_id1_io); ++ ++ hw_id1_val = gpiod_get_value(hw_id1_io); ++ gpiod_put(hw_id1_io); ++ ++ /* ++ * ID1 = 0, ID0 = 1 : Battery ++ * ID1 = 1, ID0 = 0 : Dual Battery ++ * ID1 = 0, ID0 = 0 : Adapter ++ */ ++ if (hw_id0_val == 1 && hw_id1_val == 0) ++ cw_bat->dual_battery = false; ++ else if (hw_id0_val == 0 && hw_id1_val == 1) ++ cw_bat->dual_battery = true; ++ else ++ return -EINVAL; ++ } ++ ++ /* determine the number of config info */ ++ prop = of_find_property(node, "bat_config_info", &length); ++ if (!prop) ++ return -EINVAL; ++ ++ length /= sizeof(u32); ++ ++ if (length > 0) { ++ size_t size = sizeof(*data->cw_bat_config_info) * length; ++ ++ data->cw_bat_config_info = devm_kzalloc(dev, size, GFP_KERNEL); ++ if (!data->cw_bat_config_info) ++ return -ENOMEM; ++ ++ ret = of_property_read_u32_array(node, "bat_config_info", ++ data->cw_bat_config_info, ++ length); ++ if (ret < 0) ++ return ret; ++ } ++ ++ cw_bat->bat_mode = MODE_BATTERY; ++ cw_bat->monitor_sec = CW2015_DEFAULT_MONITOR_SEC * CW2015_TIMER_MS_COUNTS; ++ ++ ret = of_property_read_u32(node, "divider_res1", &value); ++ if (ret < 0) ++ value = 0; ++ data->divider_res1 = value; ++ ++ ret = of_property_read_u32(node, "divider_res2", &value); ++ if (ret < 0) ++ value = 0; ++ data->divider_res2 = value; ++ ++ ret = of_property_read_u32(node, "virtual_power", &value); ++ if (ret < 0) ++ value = 0; ++ cw_bat->bat_mode = value; ++ ++ ret = of_property_read_u32(node, "monitor_sec", &value); ++ if (ret < 0) ++ dev_err(dev, "monitor_sec missing!\n"); ++ else ++ cw_bat->monitor_sec = value * CW2015_TIMER_MS_COUNTS; ++ ++ ret = of_property_read_u32(node, "design_capacity", &value); ++ if (ret < 0) { ++ dev_err(dev, "design_capacity missing!\n"); ++ data->design_capacity = 2000; ++ } else { ++ data->design_capacity = value; ++ } ++ ++ return 0; ++} ++#else ++static int cw2015_parse_dt(struct cw_battery *cw_bat) ++{ ++ return -ENODEV; ++} ++#endif ++ ++static int cw_bat_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ int ret; ++ struct cw_battery *cw_bat; ++ struct power_supply_config psy_cfg = {0}; ++ ++ cw_bat = devm_kzalloc(&client->dev, sizeof(*cw_bat), GFP_KERNEL); ++ if (!cw_bat) { ++ dev_err(&client->dev, ++ "fail to allocate memory for cw2015\n"); ++ return -ENOMEM; ++ } ++ ++ i2c_set_clientdata(client, cw_bat); ++ cw_bat->client = client; ++ ++ ret = cw2015_parse_dt(cw_bat); ++ if (ret < 0) { ++ dev_err(&client->dev, ++ "failed to find cw2015 platform data\n"); ++ return -1; ++ } ++ ++ cw_bat->capacity = 1; ++ cw_bat->voltage = 0; ++ cw_bat->status = 0; ++ cw_bat->suspend_resume_mark = 0; ++ cw_bat->charger_mode = CW2015_NO_CHARGING; ++ cw_bat->bat_change = 0; ++ ++ ret = cw_init(cw_bat); ++ if (ret) { ++ pr_err("%s cw_init error\n", __func__); ++ return ret; ++ } ++ ++ psy_cfg.drv_data = cw_bat; ++ ++ cw_bat->rk_bat = devm_power_supply_register(&client->dev, ++ &cw2015_bat_desc, &psy_cfg); ++ if (IS_ERR(cw_bat->rk_bat)) { ++ dev_err(&cw_bat->client->dev, ++ "power supply register rk_bat error\n"); ++ return -1; ++ } ++ ++ cw_bat->battery_workqueue = create_singlethread_workqueue("rk_battery"); ++ INIT_DELAYED_WORK(&cw_bat->battery_delay_work, cw_bat_work); ++ queue_delayed_work(cw_bat->battery_workqueue, ++ &cw_bat->battery_delay_work, msecs_to_jiffies(10)); ++ ++ dev_info(&cw_bat->client->dev, ++ "cw2015/cw2013 driver v1.2 probe sucess\n"); ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int cw_bat_suspend(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct cw_battery *cw_bat = i2c_get_clientdata(client); ++ read_persistent_clock64(&cw_bat->suspend_time_before); ++ cancel_delayed_work(&cw_bat->battery_delay_work); ++ return 0; ++} ++ ++static int cw_bat_resume(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct cw_battery *cw_bat = i2c_get_clientdata(client); ++ cw_bat->suspend_resume_mark = 1; ++ read_persistent_clock64(&cw_bat->after); ++ cw_bat->after = timespec64_sub(cw_bat->after, ++ cw_bat->suspend_time_before); ++ queue_delayed_work(cw_bat->battery_workqueue, ++ &cw_bat->battery_delay_work, msecs_to_jiffies(2)); ++ return 0; ++} ++ ++static const struct dev_pm_ops cw_bat_pm_ops = { ++ .suspend = cw_bat_suspend, ++ .resume = cw_bat_resume, ++}; ++#endif ++ ++static int cw_bat_remove(struct i2c_client *client) ++{ ++ struct cw_battery *cw_bat = i2c_get_clientdata(client); ++ ++ dev_dbg(&cw_bat->client->dev, "%s\n", __func__); ++ cancel_delayed_work(&cw_bat->battery_delay_work); ++ return 0; ++} ++ ++static const struct i2c_device_id cw_bat_id_table[] = { ++ {"cw201x", 0}, ++ {} ++}; ++ ++static struct i2c_driver cw_bat_driver = { ++ .driver = { ++ .name = "cellwise,cw201x", ++#ifdef CONFIG_PM ++ .pm = &cw_bat_pm_ops, ++#endif ++ }, ++ .probe = cw_bat_probe, ++ .remove = cw_bat_remove, ++ .id_table = cw_bat_id_table, ++}; ++ ++static int __init cw_bat_init(void) ++{ ++ return i2c_add_driver(&cw_bat_driver); ++} ++ ++static void __exit cw_bat_exit(void) ++{ ++ i2c_del_driver(&cw_bat_driver); ++} ++ ++module_init(cw_bat_init); ++module_exit(cw_bat_exit); ++ ++MODULE_AUTHOR("xhc"); ++MODULE_DESCRIPTION("cw2015/cw2013 battery driver"); ++MODULE_LICENSE("GPL"); +diff --git a/include/linux/power/cw2015_battery.h b/include/linux/power/cw2015_battery.h +new file mode 100644 +index 000000000000..59ad35b0c7f2 +--- /dev/null ++++ b/include/linux/power/cw2015_battery.h +@@ -0,0 +1,122 @@ ++/* ++ * Fuel gauge driver for CellWise 2013 / 2015 ++ * ++ * Copyright (C) 2012, RockChip ++ * Copyright (C) 2019, Tobias Schramm ++ * ++ * Authors: xuhuicong ++ * Authors: Tobias Schramm ++ * ++ * Based on rk30_adc_battery.c ++ ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#ifndef CW2015_BATTERY_H ++#define CW2015_BATTERY_H ++ ++#define CW2015_SIZE_BATINFO 64 ++ ++#define CW2015_GPIO_HIGH 1 ++#define CW2015_GPIO_LOW 0 ++ ++#define CW2015_READ_TRIES 30 ++ ++#define CW2015_REG_VERSION 0x0 ++#define CW2015_REG_VCELL 0x2 ++#define CW2015_REG_SOC 0x4 ++#define CW2015_REG_RRT_ALERT 0x6 ++#define CW2015_REG_CONFIG 0x8 ++#define CW2015_REG_MODE 0xA ++#define CW2015_REG_BATINFO 0x10 ++ ++#define CW2015_MODE_SLEEP_MASK (0x3<<6) ++#define CW2015_MODE_SLEEP (0x3<<6) ++#define CW2015_MODE_NORMAL (0x0<<6) ++#define CW2015_MODE_QUICK_START (0x3<<4) ++#define CW2015_MODE_RESTART (0xf<<0) ++ ++#define CW2015_CONFIG_UPDATE_FLG (0x01<<1) ++#define CW2015_ATHD (0x00<<3) ++#define CW2015_MASK_ATHD (0x1f<<3) ++#define CW2015_MASK_SOC (0x1fff) ++ ++#define CW2015_I2C_SPEED 100000 ++#define CW2015_BATTERY_UP_MAX_CHANGE (420 * 1000) ++#define CW2015_BATTERY_DOWN_MAX_CHANGE (120 * 1000) ++#define CW2015_BATTERY_DOWN_CHANGE 60 ++#define CW2015_BATTERY_DOWN_MIN_CHANGE_RUN 30 ++#define CW2015_BATTERY_DOWN_MIN_CHANGE_SLEEP 1800 ++#define CW2015_BATTERY_JUMP_TO_ZERO (30 * 1000) ++#define CW2015_BATTERY_CAPACITY_ERROR (40 * 1000) ++#define CW2015_BATTERY_CHARGING_ZERO (1800 * 1000) ++ ++#define CW2015_DOUBLE_SERIES_BATTERY 0 ++ ++#define CW2015_CHARGING_ON 1 ++#define CW2015_NO_CHARGING 0 ++ ++#define CW2015_BATTERY_DOWN_MAX_CHANGE_RUN_AC_ONLINE 3600 ++ ++#define CW2015_NO_STANDARD_AC_BIG_CHARGE_MODE 1 ++/* #define CW2015_SYSTEM_SHUTDOWN_VOLTAGE 3400000 */ ++#define CW2015_BAT_LOW_INTERRUPT 1 ++ ++#define CW2015_USB_CHARGER_MODE 1 ++#define CW2015_AC_CHARGER_MODE 2 ++#define CW2015_QUICKSTART 0 ++ ++#define CW2015_TIMER_MS_COUNTS 1000 ++#define CW2015_DEFAULT_MONITOR_SEC 8 ++ ++/* virtual params */ ++#define CW2015_VIRTUAL_CURRENT 1000 ++#define CW2015_VIRTUAL_VOLTAGE 3888 ++#define CW2015_VIRTUAL_SOC 66 ++#define CW2015_VIRTUAL_PRESET 1 ++#define CW2015_VIRTUAL_TEMPERATURE 188 ++#define CW2015_VIRTUAL_TIME2EMPTY 60 ++#define CW2015_VIRTUAL_STATUS POWER_SUPPLY_STATUS_CHARGING ++ ++enum bat_mode { ++ MODE_BATTERY = 0, ++ MODE_VIRTUAL, ++}; ++ ++struct cw_bat_platform_data { ++ int divider_res1; ++ int divider_res2; ++ u32 *cw_bat_config_info; ++ int design_capacity; ++}; ++ ++struct cw_battery { ++ struct i2c_client *client; ++ struct workqueue_struct *battery_workqueue; ++ struct delayed_work battery_delay_work; ++ struct cw_bat_platform_data plat_data; ++ ++ struct power_supply *rk_bat; ++ ++#ifdef CONFIG_PM ++ struct timespec64 suspend_time_before; ++ struct timespec64 after; ++ int suspend_resume_mark; ++#endif ++ int charger_mode; ++ int capacity; ++ int voltage; ++ int status; ++ int time_to_empty; ++ int alt; ++ u32 monitor_sec; ++ u32 bat_mode; ++ int bat_change; ++ bool dual_battery; ++ int charge_count; ++}; ++ ++#endif +-- +2.25.4 + + +From 5fee303127887274af61826a97b63159d6429716 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 5 Nov 2019 18:41:57 +0100 +Subject: [PATCH 03/98] arm64: Add devicetree for the Pinebook Pro + +This adds a rough first attempt at a devicetree for the Pinebook Pro. It's not +quite finished, as audio and bluetooth are currently untested. There seems to be +a problem with full shutdown, too. The pinebook is not quite off when shut down +through software. + +Signed-off-by: Tobias Schramm +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 1085 +++++++++++++++++ + 2 files changed, 1086 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 1f18a9392d15..7de9b61d6415 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +new file mode 100644 +index 000000000000..569c1490b024 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -0,0 +1,1085 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2018 Akash Gajjar ++ */ ++ ++/dts-v1/; ++#include ++#include ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "Pine64 Pinebook Pro"; ++ compatible = "pine64,pinebook-pro", "rockchip,rk3399"; ++ ++ edp_panel: edp-panel { /* "boe,nv140fhmn49" */ ++ compatible = "boe,nv140fhmn49", "simple-panel"; ++ backlight = <&backlight>; ++ power-supply = <&vcc3v3_s0>; ++// pinctrl-names = "default"; ++// pinctrl-0 = <&panel_en>; ++ enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; ++ prepare-delay-ms = <20>; ++ enable-delay-ms = <20>; ++ status = "okay"; ++ ++ ports { ++ #address-cells = <0x01>; ++ #size-cells = <0x00>; ++ port@0 { ++ panel_in_edp: endpoint@0 { ++ remote-endpoint = <&edp_out_panel>; ++ }; ++ }; ++ }; ++ }; ++ ++ chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xff1a0000"; ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ drm_logo: drm-logo@00000000 { ++ compatible = "rockchip,drm-logo"; ++ reg = <0x0 0x0 0x0 0x0>; ++ }; ++ }; ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ autorepeat; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn>; ++ ++ power { ++ debounce-interval = <100>; ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; ++ label = "GPIO Key Power"; ++ linux,code = ; ++ wakeup-source; ++ }; ++ }; ++ ++ ++ backlight: edp-backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm0 0 740740 0>; ++ power-supply = <&vcc3v3_s3>; ++ brightness-levels = < ++ 0 1 2 3 4 5 6 7 ++ 8 9 10 11 12 13 14 15 ++ 16 17 18 19 20 21 22 23 ++ 24 25 26 27 28 29 30 31 ++ 32 33 34 35 36 37 38 39 ++ 40 41 42 43 44 45 46 47 ++ 48 49 50 51 52 53 54 55 ++ 56 57 58 59 60 61 62 63 ++ 64 65 66 67 68 69 70 71 ++ 72 73 74 75 76 77 78 79 ++ 80 81 82 83 84 85 86 87 ++ 88 89 90 91 92 93 94 95 ++ 96 97 98 99 100 101 102 103 ++ 104 105 106 107 108 109 110 111 ++ 112 113 114 115 116 117 118 119 ++ 120 121 122 123 124 125 126 127 ++ 128 129 130 131 132 133 134 135 ++ 136 137 138 139 140 141 142 143 ++ 144 145 146 147 148 149 150 151 ++ 152 153 154 155 156 157 158 159 ++ 160 161 162 163 164 165 166 167 ++ 168 169 170 171 172 173 174 175 ++ 176 177 178 179 180 181 182 183 ++ 184 185 186 187 188 189 190 191 ++ 192 193 194 195 196 197 198 199 ++ 200 201 202 203 204 205 206 207 ++ 208 209 210 211 212 213 214 215 ++ 216 217 218 219 220 221 222 223 ++ 224 225 226 227 228 229 230 231 ++ 232 233 234 235 236 237 238 239 ++ 240 241 242 243 244 245 246 247 ++ 248 249 250 251 252 253 254 255>; ++ default-brightness-level = <200>; ++ status = "okay"; ++ }; ++ ++ panel { ++ vcc_lcd_en_drv: vcc-lcd-en-drv { ++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ panel_en: panel-en { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ vcc_lcd_en: vcc-lcd-en-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; ++// pinctrl-names = "default"; ++// pinctrl-0 = <&vcc_lcd_en_drv>; ++ regulator-name = "vcc_lcd_en"; ++ regulator-enable-ramp-delay = <100000>; ++ vin-supply = <&vcc3v3_sys>; ++ regulator-always-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ leds { ++ ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; ++ ++ work-led { ++ label = "work"; ++ default-state = "on"; ++ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ diy-led { ++ label = "diy"; ++ default-state = "off"; ++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "ap6354"; ++ sdio_vref = <1800>; ++ WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart0_rts>; ++ pinctrl-1 = <&uart0_gpios>; ++ BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++/* ++ es8316-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "rockchip,es8316-codec"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Mic Jack", "MICBIAS1", ++ "IN1P", "Mic Jack", ++ "Headphone Jack", "HPOL", ++ "Headphone Jack", "HPOR"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&es8316>; ++ }; ++ }; ++*/ ++ speaker-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rk-es8316-spk-sound"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ system-clock-frequency = <12288000>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&es8316>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ ++ fan0: pwm-fan { ++ compatible = "pwm-fan"; ++ pwms = <&pwm1 0 10000 0>; ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ #cooling-cells = <2>; ++ cooling-levels = <0 102 170 230>; ++ }; ++ ++ /* switched by pmic_sleep */ ++ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_1v8>; ++ }; ++ ++ vcc3v3_pcie: vcc3v3-pcie-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_pwr_en>; ++ regulator-name = "vcc3v3_pcie"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc5v0_typec: vcc5v0-typec-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_typec_en>; ++ regulator-name = "vcc5v0_typec"; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ pwm-supply = <&vcc_sys>; ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ }; ++ ++ mains_charger: dc-charger { ++ compatible = "gpio-charger"; ++ charger-type = "mains"; ++ gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; ++// pinctrl-names = "default"; ++// pinctrl-0 = <&dc_det_gpio>; ++ }; ++ ++ usb_charger: usb-charger { ++ status = "okay"; ++ compatible = "universal-charger"; ++ extcon = <&fusb0>; ++ }; ++}; ++/* ++&display_subsystem { ++ status = "okay"; ++ ++ ports = <&vopb_out>, <&vopl_out>; ++ logo-memory-region = <&drm_logo>; ++ ++ route { ++ route_dp: route-dp { ++ logo,uboot = "logo.bmp"; ++ logo,kernel = "logo_kernel.bmp"; ++ logo,mode = "center"; ++ charge_logo,mode = "center"; ++ connect = <&vopl_out_dp>; ++ }; ++ ++ route_edp: route-edp { ++ logo,uboot = "logo.bmp"; ++ logo,kernel = "logo_kernel.bmp"; ++ logo,mode = "center"; ++ charge_logo,mode = "center"; ++ connect = <&vopb_out_edp>; ++ }; ++ }; ++}; ++*/ ++&edp { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&edp_hpd>; ++ ++ ports { ++ edp_out: port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ edp_out_panel: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&panel_in_edp>; ++ }; ++ }; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_alert0 { ++ temperature = <80000>; ++}; ++ ++&cpu_alert1 { ++ temperature = <95000>; ++}; ++ ++&cpu_crit { ++ temperature = <100000>; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&hdmi { ++ ddc-i2c-bus = <&i2c3>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmi_cec>; ++ status = "disabled"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; ++ vcc7-supply = <&vcc_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc_sys>; ++ vcc10-supply = <&vcc_sys>; ++ vcc11-supply = <&vcc_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc1v8_pmu>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-name = "vdd_center"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-name = "vdd_cpu_l"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v0_touch: LDO_REG2 { ++ regulator-name = "vcc3v0_touch"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc1v8_pmu: LDO_REG3 { ++ regulator-name = "vcc1v8_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sdio: LDO_REG4 { ++ regulator-name = "vcc_sdio"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-name = "vcca3v0_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-name = "vcca1v8_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-name = "vcc_3v0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: vcc_lan: SWITCH_REG1 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel1_gpio>; ++ vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel2_gpio>; ++ vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ i2c-scl-rising-time-ns = <300>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++ ++ es8316: es8316@11 { ++ #sound-dai-cells = <0>; ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ clocks = <&cru SCLK_I2S_8CH_OUT>; ++ clock-names = "mclk"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_8ch_mclk>; ++ spk-con-gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++ ++ ++&i2c4 { ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++ status = "okay"; ++ ++ fusb0: fusb30x@22 { ++ compatible = "fairchild,fusb302"; ++ reg = <0x22>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int>; ++ vbus-5v-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; ++ int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ cw2015@62 { ++ status = "okay"; ++ compatible = "cellwise,cw201x"; ++ reg = <0x62>; ++ bat_config_info = < ++ 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63 ++ 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36 ++ 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69 ++ 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59 ++ 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17 ++ 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D ++ 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB ++ 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11 ++ >; ++ monitor_sec = <5>; ++ virtual_power = <0>; ++ design_capacity = <9800>; ++ power-supplies = <&mains_charger>, <&fusb0>; ++ }; ++}; ++ ++&i2s0 { ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&i2s1 { ++ rockchip,playback-channels = <2>; ++ rockchip,capture-channels = <2>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&i2s2 { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_dvp>; ++ audio-supply = <&vcca1v8_codec>; ++ sdmmc-supply = <&vcc_sdio>; ++ gpio1830-supply = <&vcc_3v0>; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ max-link-speed = <2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ bus-scan-delay-ms = <1000>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ dc-charger { ++ dc_det_gpio: dc-det-gpio { ++ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ fusb302x { ++ fusb0_int: fusb0-int { ++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ work_led_gpio: work_led-gpio { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ diy_led_gpio: diy_led-gpio { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd-panel { ++ lcd_panel_reset: lcd-panel-reset { ++ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pcie { ++ pcie_pwr_en: pcie-pwr-en { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb-typec { ++ vcc5v0_typec_en: vcc5v0_typec_en { ++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ rt5640 { ++ rt5640_hpcon: rt5640-hpcon { ++ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb2 { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ i2s0 { ++ i2s_8ch_mclk: i2s-8ch-mclk { ++ rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ uart0_gpios: uart0-gpios { ++ rockchip,pins = ++ <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca1v8_s3>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ sd-uhs-sdr104; ++ max-frequency = <150000000>; ++ vqmmc-supply = <&vcc_sdio>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; ++ status = "okay"; ++}; ++ ++&sdio0 { ++ supports-sdio; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++ defer_pcie = <2000>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ //mmc-hs400-1_8v; ++ mmc-hs200-1_8v; ++ //mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++}; ++ ++&tcphy0 { ++ extcon = <&fusb0>; ++ status = "okay"; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ extcon = <&fusb0>; ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++ dr_mode = "otg"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; ++ ++&spi1 { ++ status = "okay"; ++ max-freq = <10000000>; ++ ++ spiflash: spi-flash@0 { ++ #address-cells = <0x1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0x0>; ++ spi-max-frequency = <10000000>; ++ status = "okay"; ++ m25p,fast-read; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ loader@8000 { ++ label = "loader"; ++ reg = <0x0 0x3F8000>; ++ }; ++ ++ env@3f8000 { ++ label = "env"; ++ reg = <0x3F8000 0x8000>; ++ }; ++ ++ vendor@7c0000 { ++ label = "vendor"; ++ reg = <0x7C0000 0x40000>; ++ }; ++ }; ++ }; ++}; +-- +2.25.4 + + +From df17bedfb09f0d232f91c2f17356496199842165 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 5 Nov 2019 18:50:34 +0100 +Subject: [PATCH 04/98] arm64: Add Pinebook Pro defconfig + +--- + arch/arm64/configs/pinebook_pro_defconfig | 2998 +++++++++++++++++++++ + 1 file changed, 2998 insertions(+) + create mode 100644 arch/arm64/configs/pinebook_pro_defconfig + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +new file mode 100644 +index 000000000000..e9178a35ebe0 +--- /dev/null ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -0,0 +1,2998 @@ ++CONFIG_LOCALVERSION="-MANJARO-ARM" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_PREEMPT_VOLUNTARY=y ++CONFIG_IRQ_TIME_ACCOUNTING=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASKSTATS=y ++CONFIG_TASK_DELAY_ACCT=y ++CONFIG_TASK_XACCT=y ++CONFIG_TASK_IO_ACCOUNTING=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=23 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=14 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=15 ++CONFIG_MEMCG=y ++CONFIG_MEMCG_SWAP=y ++CONFIG_BLK_CGROUP=y ++CONFIG_CFS_BANDWIDTH=y ++CONFIG_CGROUP_PIDS=y ++CONFIG_CGROUP_RDMA=y ++CONFIG_CGROUP_FREEZER=y ++CONFIG_CGROUP_HUGETLB=y ++CONFIG_CPUSETS=y ++CONFIG_CGROUP_DEVICE=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_CGROUP_PERF=y ++CONFIG_CGROUP_BPF=y ++CONFIG_NAMESPACES=y ++CONFIG_USER_NS=y ++CONFIG_CHECKPOINT_RESTORE=y ++CONFIG_SCHED_AUTOGROUP=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_EXPERT=y ++CONFIG_KALLSYMS_ALL=y ++CONFIG_BPF_SYSCALL=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_SLAB_FREELIST_RANDOM=y ++CONFIG_PROFILING=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_ARM64_VA_BITS_48=y ++CONFIG_SCHED_MC=y ++CONFIG_SCHED_SMT=y ++CONFIG_NR_CPUS=8 ++CONFIG_HZ_100=y ++CONFIG_SECCOMP=y ++CONFIG_PARAVIRT_TIME_ACCOUNTING=y ++# CONFIG_ARM64_LSE_ATOMICS is not set ++CONFIG_ARM64_ACPI_PARKING_PROTOCOL=y ++CONFIG_CMDLINE="console=ttyAMA0" ++CONFIG_HIBERNATION=y ++CONFIG_PM_DEBUG=y ++CONFIG_PM_TEST_SUSPEND=y ++CONFIG_CPU_IDLE_GOV_LADDER=y ++CONFIG_ARM_CPUIDLE=y ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y ++CONFIG_CPUFREQ_DT=y ++CONFIG_ACPI_CPPC_CPUFREQ=y ++CONFIG_ARM_SCPI_CPUFREQ=y ++CONFIG_ARM_SCPI_PROTOCOL=y ++CONFIG_DMI_SYSFS=y ++CONFIG_EFI_VARS=y ++CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y ++# CONFIG_EFI_ARMSTUB_DTB_LOADER is not set ++CONFIG_EFI_BOOTLOADER_CONTROL=y ++CONFIG_ACPI=y ++CONFIG_ACPI_EC_DEBUGFS=y ++CONFIG_ACPI_DOCK=y ++CONFIG_ACPI_IPMI=m ++CONFIG_ACPI_PCI_SLOT=y ++CONFIG_ACPI_HED=y ++CONFIG_ACPI_CUSTOM_METHOD=y ++CONFIG_PMIC_OPREGION=y ++CONFIG_ACPI_CONFIGFS=m ++CONFIG_VIRTUALIZATION=y ++CONFIG_KVM=y ++CONFIG_VHOST_NET=m ++CONFIG_VHOST_SCSI=m ++CONFIG_VHOST_VSOCK=m ++CONFIG_ARM64_CRYPTO=y ++CONFIG_CRYPTO_SHA1_ARM64_CE=y ++CONFIG_CRYPTO_SHA2_ARM64_CE=y ++CONFIG_CRYPTO_SHA512_ARM64_CE=y ++CONFIG_CRYPTO_SHA3_ARM64=y ++CONFIG_CRYPTO_SM3_ARM64_CE=y ++CONFIG_CRYPTO_SM4_ARM64_CE=y ++CONFIG_CRYPTO_GHASH_ARM64_CE=y ++CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y ++CONFIG_CRYPTO_AES_ARM64_CE_CCM=y ++CONFIG_CRYPTO_AES_ARM64_CE_BLK=y ++CONFIG_CRYPTO_CHACHA20_NEON=y ++CONFIG_CRYPTO_NHPOLY1305_NEON=y ++CONFIG_CRYPTO_AES_ARM64_BS=y ++CONFIG_JUMP_LABEL=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODULE_COMPRESS=y ++CONFIG_UNUSED_SYMBOLS=y ++CONFIG_BLK_DEV_ZONED=y ++CONFIG_BLK_DEV_THROTTLING=y ++CONFIG_BLK_CMDLINE_PARSER=y ++CONFIG_BLK_WBT=y ++CONFIG_BLK_SED_OPAL=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_AIX_PARTITION=y ++CONFIG_OSF_PARTITION=y ++CONFIG_AMIGA_PARTITION=y ++CONFIG_MAC_PARTITION=y ++CONFIG_BSD_DISKLABEL=y ++CONFIG_MINIX_SUBPARTITION=y ++CONFIG_SOLARIS_X86_PARTITION=y ++CONFIG_UNIXWARE_DISKLABEL=y ++CONFIG_LDM_PARTITION=y ++CONFIG_SGI_PARTITION=y ++CONFIG_SUN_PARTITION=y ++CONFIG_KARMA_PARTITION=y ++CONFIG_IOSCHED_BFQ=y ++CONFIG_BFQ_GROUP_IOSCHED=y ++CONFIG_BINFMT_MISC=y ++CONFIG_KSM=y ++CONFIG_CLEANCACHE=y ++CONFIG_FRONTSWAP=y ++CONFIG_CMA=y ++CONFIG_CMA_DEBUGFS=y ++CONFIG_ZSWAP=y ++CONFIG_ZBUD=y ++CONFIG_Z3FOLD=y ++CONFIG_ZSMALLOC=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_PACKET_DIAG=m ++CONFIG_UNIX=y ++CONFIG_UNIX_DIAG=m ++CONFIG_TLS=m ++CONFIG_XFRM_USER=y ++CONFIG_XFRM_SUB_POLICY=y ++CONFIG_XFRM_STATISTICS=y ++CONFIG_NET_KEY=m ++CONFIG_NET_KEY_MIGRATE=y ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_IP_FIB_TRIE_STATS=y ++CONFIG_IP_MULTIPLE_TABLES=y ++CONFIG_IP_ROUTE_MULTIPATH=y ++CONFIG_IP_ROUTE_VERBOSE=y ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE_DEMUX=m ++CONFIG_NET_IPGRE=m ++CONFIG_NET_IPGRE_BROADCAST=y ++CONFIG_IP_MROUTE=y ++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IP_PIMSM_V1=y ++CONFIG_IP_PIMSM_V2=y ++CONFIG_NET_IPVTI=m ++CONFIG_NET_FOU_IP_TUNNELS=y ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m ++CONFIG_INET_IPCOMP=m ++CONFIG_INET_DIAG=m ++CONFIG_INET_UDP_DIAG=m ++CONFIG_INET_RAW_DIAG=m ++CONFIG_TCP_CONG_ADVANCED=y ++CONFIG_TCP_CONG_HSTCP=m ++CONFIG_TCP_CONG_HYBLA=m ++CONFIG_TCP_CONG_NV=m ++CONFIG_TCP_CONG_SCALABLE=m ++CONFIG_TCP_CONG_LP=m ++CONFIG_TCP_CONG_VENO=m ++CONFIG_TCP_CONG_YEAH=m ++CONFIG_TCP_CONG_ILLINOIS=m ++CONFIG_TCP_CONG_DCTCP=m ++CONFIG_TCP_CONG_CDG=m ++CONFIG_TCP_CONG_BBR=m ++CONFIG_TCP_MD5SIG=y ++CONFIG_IPV6_ROUTER_PREF=y ++CONFIG_IPV6_ROUTE_INFO=y ++CONFIG_IPV6_OPTIMISTIC_DAD=y ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++CONFIG_IPV6_MIP6=y ++CONFIG_IPV6_ILA=m ++CONFIG_IPV6_VTI=m ++CONFIG_IPV6_SIT=m ++CONFIG_IPV6_SIT_6RD=y ++CONFIG_IPV6_GRE=m ++CONFIG_IPV6_SUBTREES=y ++CONFIG_IPV6_MROUTE=y ++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IPV6_PIMSM_V2=y ++CONFIG_IPV6_SEG6_LWTUNNEL=y ++CONFIG_IPV6_SEG6_HMAC=y ++CONFIG_NETLABEL=y ++CONFIG_NETFILTER=y ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_LOG_NETDEV=m ++CONFIG_NF_CONNTRACK_ZONES=y ++CONFIG_NF_CONNTRACK_EVENTS=y ++CONFIG_NF_CONNTRACK_TIMEOUT=y ++CONFIG_NF_CONNTRACK_TIMESTAMP=y ++CONFIG_NF_CONNTRACK_AMANDA=m ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_H323=m ++CONFIG_NF_CONNTRACK_IRC=m ++CONFIG_NF_CONNTRACK_NETBIOS_NS=m ++CONFIG_NF_CONNTRACK_SNMP=m ++CONFIG_NF_CONNTRACK_PPTP=m ++CONFIG_NF_CONNTRACK_SANE=m ++CONFIG_NF_CONNTRACK_SIP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NF_CT_NETLINK=m ++CONFIG_NF_CT_NETLINK_TIMEOUT=m ++CONFIG_NF_CT_NETLINK_HELPER=m ++CONFIG_NETFILTER_NETLINK_GLUE_CT=y ++CONFIG_NF_TABLES=m ++CONFIG_NF_TABLES_SET=m ++CONFIG_NF_TABLES_INET=y ++CONFIG_NF_TABLES_NETDEV=y ++CONFIG_NFT_NUMGEN=m ++CONFIG_NFT_CT=m ++CONFIG_NFT_FLOW_OFFLOAD=m ++CONFIG_NFT_COUNTER=m ++CONFIG_NFT_CONNLIMIT=m ++CONFIG_NFT_LOG=m ++CONFIG_NFT_LIMIT=m ++CONFIG_NFT_MASQ=m ++CONFIG_NFT_REDIR=m ++CONFIG_NFT_NAT=m ++CONFIG_NFT_TUNNEL=m ++CONFIG_NFT_OBJREF=m ++CONFIG_NFT_QUEUE=m ++CONFIG_NFT_QUOTA=m ++CONFIG_NFT_REJECT=m ++CONFIG_NFT_COMPAT=m ++CONFIG_NFT_HASH=m ++CONFIG_NFT_FIB_INET=m ++CONFIG_NFT_XFRM=m ++CONFIG_NFT_SOCKET=m ++CONFIG_NFT_OSF=m ++CONFIG_NFT_TPROXY=m ++CONFIG_NFT_DUP_NETDEV=m ++CONFIG_NFT_FWD_NETDEV=m ++CONFIG_NFT_FIB_NETDEV=m ++CONFIG_NF_FLOW_TABLE_INET=m ++CONFIG_NF_FLOW_TABLE=m ++CONFIG_NETFILTER_XT_SET=m ++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_CT=m ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_HMARK=m ++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m ++CONFIG_NETFILTER_XT_TARGET_LED=m ++CONFIG_NETFILTER_XT_TARGET_LOG=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++CONFIG_NETFILTER_XT_TARGET_TEE=m ++CONFIG_NETFILTER_XT_TARGET_TPROXY=m ++CONFIG_NETFILTER_XT_TARGET_TRACE=m ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m ++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_BPF=m ++CONFIG_NETFILTER_XT_MATCH_CGROUP=m ++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m ++CONFIG_NETFILTER_XT_MATCH_COMMENT=m ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m ++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_CPU=m ++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++CONFIG_NETFILTER_XT_MATCH_IPCOMP=m ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_IPVS=m ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++CONFIG_NETFILTER_XT_MATCH_NFACCT=m ++CONFIG_NETFILTER_XT_MATCH_OSF=m ++CONFIG_NETFILTER_XT_MATCH_OWNER=m ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++CONFIG_NETFILTER_XT_MATCH_RATEEST=m ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_SOCKET=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++CONFIG_NETFILTER_XT_MATCH_TIME=m ++CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_IP_SET=m ++CONFIG_IP_SET_BITMAP_IP=m ++CONFIG_IP_SET_BITMAP_IPMAC=m ++CONFIG_IP_SET_BITMAP_PORT=m ++CONFIG_IP_SET_HASH_IP=m ++CONFIG_IP_SET_HASH_IPMARK=m ++CONFIG_IP_SET_HASH_IPPORT=m ++CONFIG_IP_SET_HASH_IPPORTIP=m ++CONFIG_IP_SET_HASH_IPPORTNET=m ++CONFIG_IP_SET_HASH_IPMAC=m ++CONFIG_IP_SET_HASH_MAC=m ++CONFIG_IP_SET_HASH_NETPORTNET=m ++CONFIG_IP_SET_HASH_NET=m ++CONFIG_IP_SET_HASH_NETNET=m ++CONFIG_IP_SET_HASH_NETPORT=m ++CONFIG_IP_SET_HASH_NETIFACE=m ++CONFIG_IP_SET_LIST_SET=m ++CONFIG_IP_VS=m ++CONFIG_IP_VS_IPV6=y ++CONFIG_IP_VS_PROTO_TCP=y ++CONFIG_IP_VS_PROTO_UDP=y ++CONFIG_IP_VS_PROTO_ESP=y ++CONFIG_IP_VS_PROTO_AH=y ++CONFIG_IP_VS_PROTO_SCTP=y ++CONFIG_IP_VS_RR=m ++CONFIG_IP_VS_WRR=m ++CONFIG_IP_VS_LC=m ++CONFIG_IP_VS_WLC=m ++CONFIG_IP_VS_FO=m ++CONFIG_IP_VS_OVF=m ++CONFIG_IP_VS_LBLC=m ++CONFIG_IP_VS_LBLCR=m ++CONFIG_IP_VS_DH=m ++CONFIG_IP_VS_SH=m ++CONFIG_IP_VS_MH=m ++CONFIG_IP_VS_SED=m ++CONFIG_IP_VS_NQ=m ++CONFIG_IP_VS_FTP=m ++CONFIG_IP_VS_PE_SIP=m ++CONFIG_NFT_DUP_IPV4=m ++CONFIG_NFT_FIB_IPV4=m ++CONFIG_NF_TABLES_ARP=y ++CONFIG_NF_FLOW_TABLE_IPV4=m ++CONFIG_NF_LOG_ARP=m ++CONFIG_NF_REJECT_IPV4=y ++CONFIG_IP_NF_IPTABLES=y ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_RPFILTER=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_TARGET_SYNPROXY=m ++CONFIG_IP_NF_NAT=m ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_CLUSTERIP=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++CONFIG_IP_NF_RAW=m ++CONFIG_IP_NF_SECURITY=m ++CONFIG_IP_NF_ARPTABLES=m ++CONFIG_IP_NF_ARPFILTER=m ++CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_NFT_DUP_IPV6=m ++CONFIG_NFT_FIB_IPV6=m ++CONFIG_NF_FLOW_TABLE_IPV6=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RPFILTER=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_MATCH_SRH=m ++CONFIG_IP6_NF_TARGET_HL=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_TARGET_SYNPROXY=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_RAW=m ++CONFIG_IP6_NF_SECURITY=m ++CONFIG_IP6_NF_NAT=m ++CONFIG_IP6_NF_TARGET_MASQUERADE=m ++CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_NF_TABLES_BRIDGE=m ++CONFIG_NFT_BRIDGE_REJECT=m ++CONFIG_NF_LOG_BRIDGE=m ++CONFIG_BRIDGE_NF_EBTABLES=m ++CONFIG_BRIDGE_EBT_BROUTE=m ++CONFIG_BRIDGE_EBT_T_FILTER=m ++CONFIG_BRIDGE_EBT_T_NAT=m ++CONFIG_BRIDGE_EBT_802_3=m ++CONFIG_BRIDGE_EBT_AMONG=m ++CONFIG_BRIDGE_EBT_ARP=m ++CONFIG_BRIDGE_EBT_IP=m ++CONFIG_BRIDGE_EBT_IP6=m ++CONFIG_BRIDGE_EBT_LIMIT=m ++CONFIG_BRIDGE_EBT_MARK=m ++CONFIG_BRIDGE_EBT_PKTTYPE=m ++CONFIG_BRIDGE_EBT_STP=m ++CONFIG_BRIDGE_EBT_VLAN=m ++CONFIG_BRIDGE_EBT_ARPREPLY=m ++CONFIG_BRIDGE_EBT_DNAT=m ++CONFIG_BRIDGE_EBT_MARK_T=m ++CONFIG_BRIDGE_EBT_REDIRECT=m ++CONFIG_BRIDGE_EBT_SNAT=m ++CONFIG_BRIDGE_EBT_LOG=m ++CONFIG_BRIDGE_EBT_NFLOG=m ++CONFIG_BPFILTER=y ++CONFIG_IP_DCCP=m ++CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y ++CONFIG_SCTP_COOKIE_HMAC_MD5=y ++CONFIG_RDS=m ++CONFIG_RDS_TCP=m ++CONFIG_TIPC=m ++CONFIG_ATM=m ++CONFIG_ATM_CLIP=m ++CONFIG_ATM_LANE=m ++CONFIG_ATM_BR2684=m ++CONFIG_L2TP=m ++CONFIG_L2TP_DEBUGFS=m ++CONFIG_L2TP_V3=y ++CONFIG_L2TP_IP=m ++CONFIG_L2TP_ETH=m ++CONFIG_BRIDGE=m ++CONFIG_BRIDGE_VLAN_FILTERING=y ++CONFIG_NET_DSA=m ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++CONFIG_VLAN_8021Q_MVRP=y ++CONFIG_ATALK=m ++CONFIG_DEV_APPLETALK=m ++CONFIG_IPDDP=m ++CONFIG_IPDDP_ENCAP=y ++CONFIG_6LOWPAN=m ++CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m ++CONFIG_6LOWPAN_GHC_UDP=m ++CONFIG_6LOWPAN_GHC_ICMPV6=m ++CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m ++CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m ++CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m ++CONFIG_IEEE802154=m ++CONFIG_IEEE802154_6LOWPAN=m ++CONFIG_MAC802154=m ++CONFIG_NET_SCHED=y ++CONFIG_NET_SCH_CBQ=m ++CONFIG_NET_SCH_HTB=m ++CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_ATM=m ++CONFIG_NET_SCH_PRIO=m ++CONFIG_NET_SCH_MULTIQ=m ++CONFIG_NET_SCH_RED=m ++CONFIG_NET_SCH_SFB=m ++CONFIG_NET_SCH_SFQ=m ++CONFIG_NET_SCH_TEQL=m ++CONFIG_NET_SCH_TBF=m ++CONFIG_NET_SCH_CBS=m ++CONFIG_NET_SCH_GRED=m ++CONFIG_NET_SCH_DSMARK=m ++CONFIG_NET_SCH_NETEM=m ++CONFIG_NET_SCH_DRR=m ++CONFIG_NET_SCH_MQPRIO=m ++CONFIG_NET_SCH_CHOKE=m ++CONFIG_NET_SCH_QFQ=m ++CONFIG_NET_SCH_CODEL=m ++CONFIG_NET_SCH_FQ_CODEL=y ++CONFIG_NET_SCH_FQ=m ++CONFIG_NET_SCH_HHF=m ++CONFIG_NET_SCH_PIE=m ++CONFIG_NET_SCH_INGRESS=m ++CONFIG_NET_SCH_PLUG=m ++CONFIG_NET_CLS_BASIC=m ++CONFIG_NET_CLS_TCINDEX=m ++CONFIG_NET_CLS_ROUTE4=m ++CONFIG_NET_CLS_FW=m ++CONFIG_NET_CLS_U32=m ++CONFIG_CLS_U32_PERF=y ++CONFIG_CLS_U32_MARK=y ++CONFIG_NET_CLS_RSVP=m ++CONFIG_NET_CLS_RSVP6=m ++CONFIG_NET_CLS_FLOW=m ++CONFIG_NET_CLS_CGROUP=y ++CONFIG_NET_CLS_BPF=m ++CONFIG_NET_CLS_FLOWER=m ++CONFIG_NET_CLS_MATCHALL=m ++CONFIG_NET_EMATCH=y ++CONFIG_NET_EMATCH_CMP=m ++CONFIG_NET_EMATCH_NBYTE=m ++CONFIG_NET_EMATCH_U32=m ++CONFIG_NET_EMATCH_META=m ++CONFIG_NET_EMATCH_TEXT=m ++CONFIG_NET_EMATCH_CANID=m ++CONFIG_NET_EMATCH_IPSET=m ++CONFIG_NET_EMATCH_IPT=m ++CONFIG_NET_CLS_ACT=y ++CONFIG_NET_ACT_POLICE=m ++CONFIG_NET_ACT_GACT=m ++CONFIG_GACT_PROB=y ++CONFIG_NET_ACT_MIRRED=m ++CONFIG_NET_ACT_SAMPLE=m ++CONFIG_NET_ACT_IPT=m ++CONFIG_NET_ACT_NAT=m ++CONFIG_NET_ACT_PEDIT=m ++CONFIG_NET_ACT_SIMP=m ++CONFIG_NET_ACT_SKBEDIT=m ++CONFIG_NET_ACT_CSUM=m ++CONFIG_NET_ACT_VLAN=m ++CONFIG_NET_ACT_BPF=m ++CONFIG_NET_ACT_CONNMARK=m ++CONFIG_NET_ACT_SKBMOD=m ++CONFIG_NET_ACT_IFE=m ++CONFIG_NET_ACT_TUNNEL_KEY=m ++CONFIG_NET_IFE_SKBMARK=m ++CONFIG_NET_IFE_SKBPRIO=m ++CONFIG_NET_IFE_SKBTCINDEX=m ++CONFIG_DCB=y ++CONFIG_BATMAN_ADV=m ++# CONFIG_BATMAN_ADV_BATMAN_V is not set ++CONFIG_BATMAN_ADV_NC=y ++CONFIG_BATMAN_ADV_DEBUGFS=y ++CONFIG_OPENVSWITCH=m ++CONFIG_VSOCKETS=m ++CONFIG_VIRTIO_VSOCKETS=m ++CONFIG_NETLINK_DIAG=m ++CONFIG_MPLS_ROUTING=m ++CONFIG_CGROUP_NET_PRIO=y ++CONFIG_BPF_JIT=y ++CONFIG_BPF_STREAM_PARSER=y ++CONFIG_NET_PKTGEN=m ++CONFIG_HAMRADIO=y ++CONFIG_AX25=m ++CONFIG_NETROM=m ++CONFIG_ROSE=m ++CONFIG_MKISS=m ++CONFIG_6PACK=m ++CONFIG_BPQETHER=m ++CONFIG_BAYCOM_SER_FDX=m ++CONFIG_BAYCOM_SER_HDX=m ++CONFIG_YAM=m ++CONFIG_CAN=m ++CONFIG_CAN_VCAN=m ++CONFIG_CAN_VXCAN=m ++CONFIG_CAN_SLCAN=m ++CONFIG_CAN_C_CAN=m ++CONFIG_CAN_C_CAN_PLATFORM=m ++CONFIG_CAN_C_CAN_PCI=m ++CONFIG_CAN_CC770=m ++CONFIG_CAN_CC770_PLATFORM=m ++CONFIG_CAN_M_CAN=m ++CONFIG_CAN_SJA1000=m ++CONFIG_CAN_EMS_PCI=m ++CONFIG_CAN_KVASER_PCI=m ++CONFIG_CAN_PEAK_PCI=m ++CONFIG_CAN_PLX_PCI=m ++CONFIG_CAN_SJA1000_PLATFORM=m ++CONFIG_CAN_SOFTING=m ++CONFIG_CAN_8DEV_USB=m ++CONFIG_CAN_EMS_USB=m ++CONFIG_CAN_ESD_USB2=m ++CONFIG_CAN_GS_USB=m ++CONFIG_CAN_KVASER_USB=m ++CONFIG_CAN_PEAK_USB=m ++CONFIG_BT=m ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++CONFIG_BT_6LOWPAN=m ++# CONFIG_BT_DEBUGFS is not set ++CONFIG_BT_HCIBTUSB=m ++CONFIG_BT_HCIBTSDIO=m ++CONFIG_BT_HCIUART=m ++CONFIG_BT_HCIUART_BCSP=y ++CONFIG_BT_HCIUART_ATH3K=y ++CONFIG_BT_HCIUART_LL=y ++CONFIG_BT_HCIUART_3WIRE=y ++CONFIG_BT_HCIUART_INTEL=y ++CONFIG_BT_HCIUART_BCM=y ++CONFIG_BT_HCIUART_QCA=y ++CONFIG_BT_HCIUART_MRVL=y ++CONFIG_BT_HCIBCM203X=m ++CONFIG_BT_HCIBPA10X=m ++CONFIG_BT_HCIBFUSB=m ++CONFIG_BT_HCIVHCI=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m ++CONFIG_BT_ATH3K=m ++CONFIG_CFG80211=m ++CONFIG_CFG80211_DEBUGFS=y ++CONFIG_MAC80211=m ++CONFIG_MAC80211_MESH=y ++CONFIG_RFKILL=m ++CONFIG_RFKILL_INPUT=y ++CONFIG_RFKILL_GPIO=m ++CONFIG_NET_9P=m ++CONFIG_NET_9P_VIRTIO=m ++CONFIG_NFC=m ++CONFIG_NFC_DIGITAL=m ++CONFIG_NFC_NCI=m ++CONFIG_NFC_HCI=m ++CONFIG_NFC_SHDLC=y ++CONFIG_NFC_SIM=m ++CONFIG_NFC_PORT100=m ++CONFIG_NFC_PN544_I2C=m ++CONFIG_NFC_MICROREAD_I2C=m ++CONFIG_NFC_MRVL_USB=m ++CONFIG_NFC_ST21NFCA_I2C=m ++CONFIG_PCI=y ++CONFIG_PCIEPORTBUS=y ++CONFIG_HOTPLUG_PCI_PCIE=y ++CONFIG_PCIEAER_INJECT=m ++CONFIG_PCIE_ECRC=y ++CONFIG_PCI_STUB=y ++CONFIG_PCI_IOV=y ++CONFIG_PCI_PRI=y ++CONFIG_PCI_PASID=y ++CONFIG_HOTPLUG_PCI=y ++CONFIG_HOTPLUG_PCI_ACPI=y ++CONFIG_PCI_HOST_GENERIC=y ++CONFIG_PCI_XGENE=y ++CONFIG_PCIE_ROCKCHIP_HOST=y ++CONFIG_PCIE_DW_PLAT_HOST=y ++CONFIG_PCI_HISI=y ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_DEBUG_DEVRES=y ++CONFIG_SIMPLE_PM_BUS=y ++CONFIG_VEXPRESS_CONFIG=y ++CONFIG_CONNECTOR=y ++CONFIG_MTD=y ++CONFIG_MTD_OF_PARTS=m ++CONFIG_MTD_BLOCK=m ++CONFIG_MTD_CFI=m ++CONFIG_MTD_CFI_INTELEXT=m ++CONFIG_MTD_CFI_AMDSTD=m ++CONFIG_MTD_CFI_STAA=m ++CONFIG_MTD_PHYSMAP=m ++CONFIG_MTD_PHYSMAP_OF=y ++CONFIG_MTD_RAW_NAND=y ++CONFIG_MTD_SPI_NOR=y ++CONFIG_MTD_UBI=m ++CONFIG_OF_CONFIGFS=y ++CONFIG_BLK_DEV_NULL_BLK=m ++CONFIG_ZRAM=m ++CONFIG_BLK_DEV_UMEM=m ++CONFIG_BLK_DEV_LOOP=m ++CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 ++CONFIG_BLK_DEV_DRBD=m ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_SKD=m ++CONFIG_BLK_DEV_SX8=m ++CONFIG_BLK_DEV_RAM=m ++CONFIG_BLK_DEV_RAM_SIZE=16384 ++CONFIG_CDROM_PKTCDVD=m ++CONFIG_ATA_OVER_ETH=m ++CONFIG_VIRTIO_BLK=m ++CONFIG_BLK_DEV_RBD=m ++CONFIG_BLK_DEV_NVME=m ++CONFIG_NVME_MULTIPATH=y ++CONFIG_TIFM_7XX1=m ++CONFIG_ENCLOSURE_SERVICES=m ++CONFIG_APDS9802ALS=m ++CONFIG_ISL29003=m ++CONFIG_ISL29020=m ++CONFIG_SENSORS_TSL2550=m ++CONFIG_SENSORS_BH1770=m ++CONFIG_SENSORS_APDS990X=m ++CONFIG_SRAM=y ++CONFIG_EEPROM_AT24=m ++CONFIG_EEPROM_LEGACY=m ++CONFIG_EEPROM_MAX6875=m ++CONFIG_SENSORS_LIS3_I2C=m ++CONFIG_ECHO=m ++CONFIG_RAID_ATTRS=m ++CONFIG_BLK_DEV_SD=y ++CONFIG_CHR_DEV_ST=m ++CONFIG_BLK_DEV_SR=y ++CONFIG_BLK_DEV_SR_VENDOR=y ++CONFIG_CHR_DEV_SG=y ++CONFIG_CHR_DEV_SCH=m ++CONFIG_SCSI_ENCLOSURE=m ++CONFIG_SCSI_CONSTANTS=y ++CONFIG_SCSI_LOGGING=y ++CONFIG_SCSI_SCAN_ASYNC=y ++CONFIG_SCSI_FC_ATTRS=m ++CONFIG_SCSI_SAS_ATA=y ++CONFIG_SCSI_SRP_ATTRS=m ++CONFIG_ISCSI_TCP=m ++CONFIG_SCSI_BNX2_ISCSI=m ++CONFIG_SCSI_BNX2X_FCOE=m ++CONFIG_BE2ISCSI=m ++CONFIG_SCSI_HPSA=m ++CONFIG_SCSI_MVSAS=m ++# CONFIG_SCSI_MVSAS_DEBUG is not set ++CONFIG_SCSI_MVSAS_TASKLET=y ++CONFIG_SCSI_MVUMI=m ++CONFIG_SCSI_ARCMSR=m ++CONFIG_SCSI_ESAS2R=m ++CONFIG_MEGARAID_NEWGEN=y ++CONFIG_MEGARAID_MM=m ++CONFIG_MEGARAID_MAILBOX=m ++CONFIG_MEGARAID_LEGACY=m ++CONFIG_MEGARAID_SAS=m ++CONFIG_SCSI_UFSHCD=y ++CONFIG_SCSI_UFSHCD_PCI=m ++CONFIG_SCSI_UFSHCD_PLATFORM=y ++CONFIG_SCSI_HPTIOP=m ++CONFIG_LIBFC=m ++CONFIG_LIBFCOE=m ++CONFIG_FCOE=m ++CONFIG_SCSI_SNIC=m ++CONFIG_SCSI_DMX3191D=m ++CONFIG_SCSI_INITIO=m ++CONFIG_SCSI_INIA100=m ++CONFIG_SCSI_STEX=m ++CONFIG_SCSI_SYM53C8XX_2=m ++CONFIG_SCSI_IPR=m ++CONFIG_SCSI_QLOGIC_1280=m ++CONFIG_SCSI_QLA_FC=m ++CONFIG_TCM_QLA2XXX=m ++CONFIG_SCSI_QLA_ISCSI=m ++CONFIG_SCSI_DC395x=m ++CONFIG_SCSI_AM53C974=m ++CONFIG_SCSI_WD719X=m ++CONFIG_SCSI_DEBUG=m ++CONFIG_SCSI_PMCRAID=m ++CONFIG_SCSI_VIRTIO=y ++CONFIG_SCSI_CHELSIO_FCOE=m ++CONFIG_SCSI_DH=y ++CONFIG_SCSI_DH_RDAC=m ++CONFIG_SCSI_DH_HP_SW=m ++CONFIG_SCSI_DH_EMC=m ++CONFIG_SCSI_DH_ALUA=m ++CONFIG_ATA=y ++CONFIG_SATA_AHCI=y ++CONFIG_SATA_AHCI_PLATFORM=y ++CONFIG_AHCI_XGENE=y ++CONFIG_SATA_INIC162X=m ++CONFIG_SATA_ACARD_AHCI=m ++CONFIG_SATA_SIL24=y ++CONFIG_PDC_ADMA=m ++CONFIG_SATA_QSTOR=m ++CONFIG_SATA_SX4=m ++CONFIG_ATA_PIIX=y ++CONFIG_SATA_MV=m ++CONFIG_SATA_NV=m ++CONFIG_SATA_PROMISE=m ++CONFIG_SATA_SIL=m ++CONFIG_SATA_SIS=m ++CONFIG_SATA_SVW=m ++CONFIG_SATA_ULI=m ++CONFIG_SATA_VIA=m ++CONFIG_SATA_VITESSE=m ++CONFIG_PATA_ALI=m ++CONFIG_PATA_AMD=m ++CONFIG_PATA_ARTOP=m ++CONFIG_PATA_ATIIXP=m ++CONFIG_PATA_ATP867X=m ++CONFIG_PATA_CMD64X=m ++CONFIG_PATA_CYPRESS=m ++CONFIG_PATA_EFAR=m ++CONFIG_PATA_HPT366=m ++CONFIG_PATA_HPT37X=m ++CONFIG_PATA_HPT3X2N=m ++CONFIG_PATA_HPT3X3=m ++CONFIG_PATA_IT8213=m ++CONFIG_PATA_IT821X=m ++CONFIG_PATA_JMICRON=m ++CONFIG_PATA_MARVELL=m ++CONFIG_PATA_NETCELL=m ++CONFIG_PATA_NINJA32=m ++CONFIG_PATA_NS87415=m ++CONFIG_PATA_OLDPIIX=m ++CONFIG_PATA_OPTIDMA=m ++CONFIG_PATA_PDC2027X=m ++CONFIG_PATA_PDC_OLD=m ++CONFIG_PATA_RDC=m ++CONFIG_PATA_SCH=m ++CONFIG_PATA_SERVERWORKS=m ++CONFIG_PATA_SIL680=m ++CONFIG_PATA_TOSHIBA=m ++CONFIG_PATA_TRIFLEX=m ++CONFIG_PATA_VIA=m ++CONFIG_PATA_WINBOND=m ++CONFIG_PATA_CMD640_PCI=m ++CONFIG_PATA_MPIIX=m ++CONFIG_PATA_NS87410=m ++CONFIG_PATA_OPTI=m ++CONFIG_PATA_PLATFORM=y ++CONFIG_PATA_OF_PLATFORM=y ++CONFIG_ATA_GENERIC=m ++CONFIG_MD=y ++CONFIG_BLK_DEV_MD=y ++CONFIG_MD_LINEAR=m ++CONFIG_MD_MULTIPATH=m ++CONFIG_MD_FAULTY=m ++CONFIG_MD_CLUSTER=m ++CONFIG_BCACHE=m ++CONFIG_BLK_DEV_DM=y ++CONFIG_DM_DEBUG=y ++CONFIG_DM_CRYPT=m ++CONFIG_DM_SNAPSHOT=y ++CONFIG_DM_THIN_PROVISIONING=m ++CONFIG_DM_CACHE=m ++CONFIG_DM_WRITECACHE=m ++CONFIG_DM_MIRROR=y ++CONFIG_DM_LOG_USERSPACE=m ++CONFIG_DM_RAID=m ++CONFIG_DM_ZERO=y ++CONFIG_DM_MULTIPATH=m ++CONFIG_DM_MULTIPATH_QL=m ++CONFIG_DM_MULTIPATH_ST=m ++CONFIG_DM_DELAY=m ++CONFIG_DM_DUST=m ++CONFIG_DM_INIT=y ++CONFIG_DM_UEVENT=y ++CONFIG_DM_FLAKEY=m ++CONFIG_DM_VERITY=m ++CONFIG_DM_VERITY_FEC=y ++CONFIG_DM_SWITCH=m ++CONFIG_DM_LOG_WRITES=m ++CONFIG_DM_INTEGRITY=m ++CONFIG_DM_ZONED=m ++CONFIG_TARGET_CORE=m ++CONFIG_TCM_IBLOCK=m ++CONFIG_TCM_FILEIO=m ++CONFIG_TCM_PSCSI=m ++CONFIG_TCM_USER2=m ++CONFIG_LOOPBACK_TARGET=m ++CONFIG_TCM_FC=m ++CONFIG_ISCSI_TARGET=m ++CONFIG_FIREWIRE_NOSY=m ++CONFIG_BONDING=m ++CONFIG_DUMMY=m ++CONFIG_EQUALIZER=m ++CONFIG_NET_FC=y ++CONFIG_IFB=m ++CONFIG_NET_TEAM=m ++CONFIG_NET_TEAM_MODE_BROADCAST=m ++CONFIG_NET_TEAM_MODE_ROUNDROBIN=m ++CONFIG_NET_TEAM_MODE_RANDOM=m ++CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m ++CONFIG_NET_TEAM_MODE_LOADBALANCE=m ++CONFIG_MACVLAN=m ++CONFIG_MACVTAP=m ++CONFIG_IPVLAN=m ++CONFIG_IPVTAP=m ++CONFIG_VXLAN=m ++CONFIG_GENEVE=m ++CONFIG_NETCONSOLE=m ++CONFIG_NETCONSOLE_DYNAMIC=y ++CONFIG_TUN=m ++CONFIG_VETH=m ++CONFIG_VIRTIO_NET=m ++CONFIG_NLMON=m ++CONFIG_NET_VRF=m ++# CONFIG_ATM_DRIVERS is not set ++CONFIG_NET_DSA_BCM_SF2=m ++CONFIG_NET_DSA_MV88E6060=m ++CONFIG_NET_DSA_MV88E6XXX=m ++CONFIG_NET_DSA_MV88E6XXX_PTP=y ++CONFIG_NET_DSA_QCA8K=m ++# CONFIG_NET_VENDOR_3COM is not set ++# CONFIG_NET_VENDOR_ADAPTEC is not set ++CONFIG_ET131X=m ++CONFIG_ACENIC=m ++CONFIG_ALTERA_TSE=m ++CONFIG_AMD8111_ETH=m ++CONFIG_PCNET32=m ++CONFIG_AMD_XGBE=m ++CONFIG_AQTION=m ++CONFIG_ATL2=m ++CONFIG_ATL1=m ++CONFIG_ATL1E=m ++CONFIG_ATL1C=m ++CONFIG_ALX=m ++# CONFIG_NET_VENDOR_AURORA is not set ++CONFIG_B44=m ++CONFIG_BCMGENET=m ++CONFIG_TIGON3=m ++CONFIG_BNX2X=m ++# CONFIG_NET_VENDOR_BROCADE is not set ++CONFIG_MACB=m ++# CONFIG_NET_VENDOR_CAVIUM is not set ++# CONFIG_NET_VENDOR_CHELSIO is not set ++# CONFIG_NET_VENDOR_CISCO is not set ++CONFIG_DNET=m ++# CONFIG_NET_VENDOR_DEC is not set ++CONFIG_DL2K=m ++CONFIG_SUNDANCE=m ++# CONFIG_NET_VENDOR_EMULEX is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++CONFIG_HIX5HD2_GMAC=m ++CONFIG_HIP04_ETH=m ++CONFIG_HNS_DSAF=m ++CONFIG_HNS_ENET=m ++# CONFIG_NET_VENDOR_HP is not set ++# CONFIG_NET_VENDOR_I825XX is not set ++CONFIG_E100=m ++CONFIG_E1000=m ++CONFIG_E1000E=m ++CONFIG_IGB=m ++CONFIG_IGBVF=m ++CONFIG_IXGB=m ++CONFIG_IXGBE=m ++CONFIG_IXGBE_DCB=y ++CONFIG_IXGBEVF=m ++CONFIG_I40E=m ++CONFIG_I40EVF=m ++CONFIG_FM10K=m ++CONFIG_JME=m ++CONFIG_MVMDIO=m ++CONFIG_SKGE=m ++CONFIG_SKGE_GENESIS=y ++CONFIG_SKY2=m ++CONFIG_MLX4_EN=m ++CONFIG_KSZ884X_PCI=m ++CONFIG_MYRI10GE=m ++CONFIG_FEALNX=m ++CONFIG_NATSEMI=m ++CONFIG_NS83820=m ++CONFIG_NE2K_PCI=m ++CONFIG_FORCEDETH=m ++CONFIG_ETHOC=m ++CONFIG_HAMACHI=m ++CONFIG_YELLOWFIN=m ++# CONFIG_NET_VENDOR_QLOGIC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++CONFIG_R6040=m ++CONFIG_8139CP=m ++CONFIG_8139TOO=m ++# CONFIG_8139TOO_PIO is not set ++CONFIG_8139TOO_8129=y ++CONFIG_R8169=m ++# CONFIG_NET_VENDOR_RENESAS is not set ++CONFIG_ROCKER=m ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++CONFIG_SC92031=m ++CONFIG_SIS900=m ++CONFIG_SIS190=m ++CONFIG_SMC91X=m ++CONFIG_EPIC100=m ++CONFIG_SMSC911X=m ++CONFIG_SMSC9420=m ++CONFIG_STMMAC_ETH=m ++CONFIG_DWMAC_DWC_QOS_ETH=m ++# CONFIG_NET_VENDOR_SUN is not set ++CONFIG_TEHUTI=m ++CONFIG_VIA_RHINE=m ++CONFIG_VIA_RHINE_MMIO=y ++CONFIG_VIA_VELOCITY=m ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_NET_SB1000=y ++CONFIG_MDIO_BITBANG=m ++CONFIG_MDIO_BUS_MUX_GPIO=m ++CONFIG_MDIO_BUS_MUX_MMIOREG=m ++CONFIG_PHYLIB=y ++CONFIG_LED_TRIGGER_PHY=y ++CONFIG_SFP=m ++CONFIG_AMD_PHY=m ++CONFIG_AT803X_PHY=m ++CONFIG_BCM87XX_PHY=m ++CONFIG_BROADCOM_PHY=m ++CONFIG_CICADA_PHY=m ++CONFIG_DAVICOM_PHY=m ++CONFIG_DP83848_PHY=m ++CONFIG_DP83867_PHY=m ++CONFIG_ICPLUS_PHY=m ++CONFIG_LSI_ET1011C_PHY=m ++CONFIG_LXT_PHY=m ++CONFIG_MARVELL_10G_PHY=m ++CONFIG_MICREL_PHY=m ++CONFIG_NATIONAL_PHY=m ++CONFIG_QSEMI_PHY=m ++CONFIG_ROCKCHIP_PHY=y ++CONFIG_STE10XP=m ++CONFIG_VITESSE_PHY=m ++CONFIG_PPP=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_MPPE=m ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPPOATM=m ++CONFIG_PPPOE=m ++CONFIG_PPTP=m ++CONFIG_PPPOL2TP=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_SLIP_SMART=y ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_RTL8152=m ++CONFIG_USB_LAN78XX=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_HUAWEI_CDC_NCM=m ++CONFIG_USB_NET_CDC_MBIM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SR9700=m ++CONFIG_USB_NET_SR9800=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=m ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_EPSON2888=y ++CONFIG_USB_KC2190=y ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_QMI_WWAN=m ++CONFIG_USB_HSO=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m ++CONFIG_USB_NET_CH9200=m ++CONFIG_ADM8211=m ++CONFIG_ATH5K=m ++CONFIG_ATH5K_DEBUG=y ++CONFIG_ATH9K=m ++CONFIG_ATH9K_AHB=y ++CONFIG_ATH9K_DEBUGFS=y ++CONFIG_ATH9K_HTC=m ++CONFIG_ATH9K_HWRNG=y ++CONFIG_ATH9K_COMMON_SPECTRAL=y ++CONFIG_CARL9170=m ++CONFIG_ATH6KL=m ++CONFIG_ATH6KL_SDIO=m ++CONFIG_ATH6KL_USB=m ++CONFIG_ATH6KL_DEBUG=y ++CONFIG_AR5523=m ++CONFIG_WIL6210=m ++CONFIG_ATH10K=m ++CONFIG_ATH10K_PCI=m ++CONFIG_ATH10K_DEBUGFS=y ++CONFIG_WCN36XX=m ++CONFIG_ATMEL=m ++CONFIG_PCI_ATMEL=m ++CONFIG_AT76C50X_USB=m ++CONFIG_B43=m ++CONFIG_B43_SDIO=y ++CONFIG_B43_DEBUG=y ++CONFIG_B43LEGACY=m ++CONFIG_BRCMSMAC=m ++CONFIG_BRCMFMAC=m ++CONFIG_BRCMFMAC_USB=y ++CONFIG_BRCMFMAC_PCIE=y ++CONFIG_IPW2100=m ++CONFIG_IPW2100_MONITOR=y ++CONFIG_IPW2200=m ++CONFIG_IPW2200_MONITOR=y ++CONFIG_IPW2200_PROMISCUOUS=y ++CONFIG_IPW2200_QOS=y ++CONFIG_IWL4965=m ++CONFIG_IWL3945=m ++CONFIG_IWLEGACY_DEBUG=y ++CONFIG_IWLEGACY_DEBUGFS=y ++CONFIG_IWLWIFI=m ++CONFIG_IWLDVM=m ++CONFIG_IWLMVM=m ++CONFIG_IWLWIFI_DEBUG=y ++CONFIG_IWLWIFI_DEBUGFS=y ++# CONFIG_IWLWIFI_DEVICE_TRACING is not set ++CONFIG_HOSTAP=m ++CONFIG_HOSTAP_FIRMWARE=y ++CONFIG_HOSTAP_PLX=m ++CONFIG_HOSTAP_PCI=m ++CONFIG_HERMES=m ++CONFIG_HERMES_PRISM=y ++CONFIG_PLX_HERMES=m ++CONFIG_TMD_HERMES=m ++CONFIG_NORTEL_HERMES=m ++CONFIG_PCI_HERMES=m ++CONFIG_ORINOCO_USB=m ++CONFIG_P54_COMMON=m ++CONFIG_P54_USB=m ++CONFIG_P54_PCI=m ++CONFIG_PRISM54=m ++CONFIG_LIBERTAS=m ++CONFIG_LIBERTAS_USB=m ++CONFIG_LIBERTAS_SDIO=m ++CONFIG_LIBERTAS_MESH=y ++CONFIG_LIBERTAS_THINFIRM=m ++CONFIG_LIBERTAS_THINFIRM_USB=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++CONFIG_MWIFIEX_PCIE=m ++CONFIG_MWIFIEX_USB=m ++CONFIG_MWL8K=m ++CONFIG_MT7601U=m ++CONFIG_RT2X00=m ++CONFIG_RT2400PCI=m ++CONFIG_RT2500PCI=m ++CONFIG_RT61PCI=m ++CONFIG_RT2800PCI=m ++CONFIG_RT2500USB=m ++CONFIG_RT73USB=m ++CONFIG_RT2800USB=m ++CONFIG_RT2800USB_RT3573=y ++CONFIG_RT2800USB_RT53XX=y ++CONFIG_RT2800USB_RT55XX=y ++CONFIG_RT2800USB_UNKNOWN=y ++CONFIG_RT2X00_LIB_DEBUGFS=y ++CONFIG_RTL8180=m ++CONFIG_RTL8187=m ++CONFIG_RTL8192CE=m ++CONFIG_RTL8192SE=m ++CONFIG_RTL8192DE=m ++CONFIG_RTL8723AE=m ++CONFIG_RTL8723BE=m ++CONFIG_RTL8188EE=m ++CONFIG_RTL8192EE=m ++CONFIG_RTL8821AE=m ++CONFIG_RTL8192CU=m ++CONFIG_RTL8XXXU=m ++CONFIG_RSI_91X=m ++CONFIG_CW1200=m ++CONFIG_CW1200_WLAN_SDIO=m ++CONFIG_WL1251=m ++CONFIG_WL1251_SPI=m ++CONFIG_WL1251_SDIO=m ++CONFIG_WL12XX=m ++CONFIG_WL18XX=m ++CONFIG_WLCORE_SPI=m ++CONFIG_WLCORE_SDIO=m ++CONFIG_USB_ZD1201=m ++CONFIG_ZD1211RW=m ++CONFIG_QTNFMAC_PCIE=m ++CONFIG_MAC80211_HWSIM=m ++CONFIG_USB_NET_RNDIS_WLAN=m ++CONFIG_IEEE802154_FAKELB=m ++CONFIG_IEEE802154_ATUSB=m ++CONFIG_INPUT_SPARSEKMAP=m ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=y ++CONFIG_KEYBOARD_ADC=m ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_GPIO_POLLED=m ++CONFIG_KEYBOARD_CROS_EC=y ++CONFIG_MOUSE_PS2_ELANTECH=y ++CONFIG_MOUSE_PS2_SENTELIC=y ++CONFIG_MOUSE_SERIAL=m ++CONFIG_MOUSE_APPLETOUCH=m ++CONFIG_MOUSE_BCM5974=m ++CONFIG_MOUSE_CYAPA=m ++CONFIG_MOUSE_ELAN_I2C=y ++CONFIG_MOUSE_ELAN_I2C_SMBUS=y ++CONFIG_MOUSE_VSXXXAA=m ++CONFIG_MOUSE_SYNAPTICS_I2C=m ++CONFIG_MOUSE_SYNAPTICS_USB=m ++CONFIG_INPUT_JOYSTICK=y ++CONFIG_JOYSTICK_IFORCE=m ++CONFIG_JOYSTICK_IFORCE_USB=m ++CONFIG_JOYSTICK_IFORCE_232=m ++CONFIG_JOYSTICK_WARRIOR=m ++CONFIG_JOYSTICK_MAGELLAN=m ++CONFIG_JOYSTICK_SPACEORB=m ++CONFIG_JOYSTICK_SPACEBALL=m ++CONFIG_JOYSTICK_STINGER=m ++CONFIG_JOYSTICK_TWIDJOY=m ++CONFIG_JOYSTICK_ZHENHUA=m ++CONFIG_JOYSTICK_XPAD=m ++CONFIG_JOYSTICK_XPAD_FF=y ++CONFIG_JOYSTICK_XPAD_LEDS=y ++CONFIG_INPUT_TABLET=y ++CONFIG_TABLET_USB_ACECAD=m ++CONFIG_TABLET_USB_AIPTEK=m ++CONFIG_TABLET_USB_GTCO=m ++CONFIG_TABLET_USB_HANWANG=m ++CONFIG_TABLET_USB_KBTAB=m ++CONFIG_TABLET_USB_PEGASUS=m ++CONFIG_TABLET_SERIAL_WACOM4=m ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_ATMEL_MXT=y ++CONFIG_TOUCHSCREEN_AUO_PIXCIR=m ++CONFIG_TOUCHSCREEN_DYNAPRO=m ++CONFIG_TOUCHSCREEN_EETI=m ++CONFIG_TOUCHSCREEN_EGALAX=m ++CONFIG_TOUCHSCREEN_FUJITSU=m ++CONFIG_TOUCHSCREEN_ILI210X=m ++CONFIG_TOUCHSCREEN_GUNZE=m ++CONFIG_TOUCHSCREEN_ELAN=m ++CONFIG_TOUCHSCREEN_ELO=m ++CONFIG_TOUCHSCREEN_WACOM_W8001=m ++CONFIG_TOUCHSCREEN_WACOM_I2C=m ++CONFIG_TOUCHSCREEN_MCS5000=m ++CONFIG_TOUCHSCREEN_MMS114=m ++CONFIG_TOUCHSCREEN_MTOUCH=m ++CONFIG_TOUCHSCREEN_INEXIO=m ++CONFIG_TOUCHSCREEN_MK712=m ++CONFIG_TOUCHSCREEN_PENMOUNT=m ++CONFIG_TOUCHSCREEN_EDT_FT5X06=m ++CONFIG_TOUCHSCREEN_TOUCHRIGHT=m ++CONFIG_TOUCHSCREEN_TOUCHWIN=m ++CONFIG_TOUCHSCREEN_PIXCIR=m ++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m ++CONFIG_TOUCHSCREEN_TOUCHIT213=m ++CONFIG_TOUCHSCREEN_TSC_SERIO=m ++CONFIG_TOUCHSCREEN_TSC2007=m ++CONFIG_TOUCHSCREEN_ST1232=m ++CONFIG_TOUCHSCREEN_ZFORCE=m ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_E3X0_BUTTON=m ++CONFIG_INPUT_MMA8450=m ++CONFIG_INPUT_GP2A=m ++CONFIG_INPUT_ATI_REMOTE2=m ++CONFIG_INPUT_KEYSPAN_REMOTE=m ++CONFIG_INPUT_KXTJ9=m ++CONFIG_INPUT_POWERMATE=m ++CONFIG_INPUT_YEALINK=m ++CONFIG_INPUT_CM109=m ++CONFIG_INPUT_AXP20X_PEK=m ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_PWM_BEEPER=m ++CONFIG_INPUT_RK805_PWRKEY=m ++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m ++CONFIG_INPUT_CMA3000=m ++CONFIG_INPUT_CMA3000_I2C=m ++CONFIG_SERIO_AMBAKMI=y ++CONFIG_SERIO_RAW=m ++CONFIG_SERIO_ALTERA_PS2=m ++CONFIG_SERIO_ARC_PS2=m ++# CONFIG_LEGACY_PTYS is not set ++CONFIG_SERIAL_NONSTANDARD=y ++CONFIG_ROCKETPORT=m ++CONFIG_CYCLADES=m ++CONFIG_SYNCLINKMP=m ++CONFIG_SYNCLINK_GT=m ++CONFIG_NOZOMI=m ++CONFIG_N_HDLC=m ++CONFIG_N_GSM=m ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_NR_UARTS=32 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_MANY_PORTS=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_RSA=y ++CONFIG_SERIAL_8250_DW=y ++CONFIG_SERIAL_OF_PLATFORM=y ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y ++CONFIG_SERIAL_JSM=m ++CONFIG_SERIAL_ARC=m ++CONFIG_SERIAL_FSL_LPUART=y ++CONFIG_SERIAL_FSL_LPUART_CONSOLE=y ++CONFIG_SERIAL_DEV_BUS=y ++CONFIG_VIRTIO_CONSOLE=y ++CONFIG_IPMI_HANDLER=y ++CONFIG_IPMI_DEVICE_INTERFACE=m ++CONFIG_IPMI_SSIF=m ++CONFIG_IPMI_WATCHDOG=m ++CONFIG_IPMI_POWEROFF=m ++CONFIG_HW_RANDOM=y ++CONFIG_HW_RANDOM_TIMERIOMEM=m ++CONFIG_HW_RANDOM_VIRTIO=m ++CONFIG_RAW_DRIVER=y ++CONFIG_MAX_RAW_DEVS=8192 ++CONFIG_TCG_TPM=y ++CONFIG_TCG_TIS_I2C_INFINEON=y ++CONFIG_TCG_ATMEL=m ++CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_ARB_GPIO_CHALLENGE=m ++CONFIG_I2C_MUX_GPIO=m ++CONFIG_I2C_MUX_GPMUX=m ++CONFIG_I2C_MUX_PCA9541=m ++CONFIG_I2C_MUX_PCA954x=y ++CONFIG_I2C_MUX_PINCTRL=m ++CONFIG_I2C_MUX_REG=m ++CONFIG_I2C_DEMUX_PINCTRL=m ++CONFIG_I2C_NFORCE2=m ++CONFIG_I2C_SCMI=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++CONFIG_I2C_DESIGNWARE_PCI=m ++CONFIG_I2C_GPIO=m ++CONFIG_I2C_PCA_PLATFORM=m ++CONFIG_I2C_RK3X=y ++CONFIG_I2C_SIMTEC=m ++CONFIG_I2C_DIOLAN_U2C=m ++CONFIG_I2C_PARPORT_LIGHT=m ++CONFIG_I2C_TINY_USB=m ++CONFIG_I2C_VIPERBOARD=m ++CONFIG_I2C_CROS_EC_TUNNEL=y ++CONFIG_I2C_STUB=m ++CONFIG_I2C_SLAVE=y ++CONFIG_I2C_SLAVE_EEPROM=m ++CONFIG_SPI=y ++CONFIG_SPI_NXP_FLEXSPI=y ++CONFIG_SPI_GPIO=y ++CONFIG_SPI_PL022=y ++CONFIG_SPI_ROCKCHIP=y ++CONFIG_SPI_SPIDEV=m ++CONFIG_SPMI=y ++CONFIG_PPS_CLIENT_LDISC=m ++CONFIG_PPS_CLIENT_GPIO=m ++CONFIG_DP83640_PHY=m ++CONFIG_PINCTRL_AMD=y ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_PINCTRL_MAX77620=y ++CONFIG_PINCTRL_RK805=y ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_DWAPB=y ++CONFIG_GPIO_PL061=y ++CONFIG_GPIO_SYSCON=y ++CONFIG_GPIO_XGENE=y ++CONFIG_GPIO_PCA953X=y ++CONFIG_GPIO_PCA953X_IRQ=y ++CONFIG_GPIO_MAX77620=y ++CONFIG_GPIO_VIPERBOARD=m ++CONFIG_W1=m ++CONFIG_W1_MASTER_DS2490=m ++CONFIG_W1_MASTER_DS2482=m ++CONFIG_W1_MASTER_DS1WM=m ++CONFIG_W1_SLAVE_THERM=m ++CONFIG_W1_SLAVE_SMEM=m ++CONFIG_W1_SLAVE_DS2408=m ++# CONFIG_W1_SLAVE_DS2408_READBACK is not set ++CONFIG_W1_SLAVE_DS2413=m ++CONFIG_W1_SLAVE_DS2406=m ++CONFIG_W1_SLAVE_DS2423=m ++CONFIG_W1_SLAVE_DS2431=m ++CONFIG_W1_SLAVE_DS2433=m ++CONFIG_W1_SLAVE_DS2433_CRC=y ++CONFIG_W1_SLAVE_DS2780=m ++CONFIG_W1_SLAVE_DS2781=m ++CONFIG_W1_SLAVE_DS28E04=m ++CONFIG_POWER_AVS=y ++CONFIG_ROCKCHIP_IODOMAIN=y ++CONFIG_POWER_RESET_GPIO=y ++CONFIG_POWER_RESET_GPIO_RESTART=y ++CONFIG_POWER_RESET_RESTART=y ++CONFIG_POWER_RESET_VEXPRESS=y ++CONFIG_POWER_RESET_XGENE=y ++CONFIG_POWER_RESET_SYSCON=y ++CONFIG_POWER_RESET_SYSCON_POWEROFF=y ++CONFIG_SYSCON_REBOOT_MODE=y ++CONFIG_BATTERY_CW2015=y ++CONFIG_BATTERY_SBS=m ++CONFIG_CHARGER_SBS=m ++CONFIG_MANAGER_SBS=m ++CONFIG_CHARGER_AXP20X=m ++CONFIG_CHARGER_GPIO=y ++CONFIG_CHARGER_SMB347=m ++CONFIG_CHARGER_CROS_USBPD=m ++CONFIG_SENSORS_AD7414=m ++CONFIG_SENSORS_AD7418=m ++CONFIG_SENSORS_ADM1021=m ++CONFIG_SENSORS_ADM1025=m ++CONFIG_SENSORS_ADM1026=m ++CONFIG_SENSORS_ADM1029=m ++CONFIG_SENSORS_ADM1031=m ++CONFIG_SENSORS_ADM9240=m ++CONFIG_SENSORS_ADT7410=m ++CONFIG_SENSORS_ADT7411=m ++CONFIG_SENSORS_ADT7462=m ++CONFIG_SENSORS_ADT7470=m ++CONFIG_SENSORS_ADT7475=m ++CONFIG_SENSORS_ASC7621=m ++CONFIG_SENSORS_ARM_SCPI=y ++CONFIG_SENSORS_ATXP1=m ++CONFIG_SENSORS_DS620=m ++CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_F71805F=m ++CONFIG_SENSORS_F71882FG=m ++CONFIG_SENSORS_F75375S=m ++CONFIG_SENSORS_GL518SM=m ++CONFIG_SENSORS_GL520SM=m ++CONFIG_SENSORS_G760A=m ++CONFIG_SENSORS_G762=m ++CONFIG_SENSORS_GPIO_FAN=m ++CONFIG_SENSORS_IBMAEM=m ++CONFIG_SENSORS_IBMPEX=m ++CONFIG_SENSORS_IIO_HWMON=m ++CONFIG_SENSORS_IT87=m ++CONFIG_SENSORS_POWR1220=m ++CONFIG_SENSORS_LINEAGE=m ++CONFIG_SENSORS_LTC2945=m ++CONFIG_SENSORS_LTC4151=m ++CONFIG_SENSORS_LTC4215=m ++CONFIG_SENSORS_LTC4222=m ++CONFIG_SENSORS_LTC4245=m ++CONFIG_SENSORS_LTC4260=m ++CONFIG_SENSORS_LTC4261=m ++CONFIG_SENSORS_MAX16065=m ++CONFIG_SENSORS_MAX1619=m ++CONFIG_SENSORS_MAX1668=m ++CONFIG_SENSORS_MAX197=m ++CONFIG_SENSORS_MAX6639=m ++CONFIG_SENSORS_MAX6642=m ++CONFIG_SENSORS_MAX6650=m ++CONFIG_SENSORS_MAX6697=m ++CONFIG_SENSORS_MCP3021=m ++CONFIG_SENSORS_LM63=m ++CONFIG_SENSORS_LM73=m ++CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_LM77=m ++CONFIG_SENSORS_LM78=m ++CONFIG_SENSORS_LM80=m ++CONFIG_SENSORS_LM83=m ++CONFIG_SENSORS_LM85=m ++CONFIG_SENSORS_LM87=m ++CONFIG_SENSORS_LM90=m ++CONFIG_SENSORS_LM92=m ++CONFIG_SENSORS_LM93=m ++CONFIG_SENSORS_LM95234=m ++CONFIG_SENSORS_LM95241=m ++CONFIG_SENSORS_LM95245=m ++CONFIG_SENSORS_PC87360=m ++CONFIG_SENSORS_PC87427=m ++CONFIG_SENSORS_NTC_THERMISTOR=m ++CONFIG_SENSORS_NCT6683=m ++CONFIG_SENSORS_NCT6775=m ++CONFIG_SENSORS_NCT7802=m ++CONFIG_SENSORS_NCT7904=m ++CONFIG_SENSORS_PCF8591=m ++CONFIG_PMBUS=m ++CONFIG_SENSORS_ADM1275=m ++CONFIG_SENSORS_LM25066=m ++CONFIG_SENSORS_LTC2978=m ++CONFIG_SENSORS_MAX16064=m ++CONFIG_SENSORS_MAX34440=m ++CONFIG_SENSORS_MAX8688=m ++CONFIG_SENSORS_TPS40422=m ++CONFIG_SENSORS_UCD9000=m ++CONFIG_SENSORS_UCD9200=m ++CONFIG_SENSORS_ZL6100=m ++CONFIG_SENSORS_PWM_FAN=m ++CONFIG_SENSORS_SHT15=m ++CONFIG_SENSORS_SHT21=m ++CONFIG_SENSORS_SHT3x=m ++CONFIG_SENSORS_SHTC1=m ++CONFIG_SENSORS_SIS5595=m ++CONFIG_SENSORS_DME1737=m ++CONFIG_SENSORS_EMC1403=m ++CONFIG_SENSORS_EMC6W201=m ++CONFIG_SENSORS_SMSC47M1=m ++CONFIG_SENSORS_SMSC47M192=m ++CONFIG_SENSORS_SMSC47B397=m ++CONFIG_SENSORS_SCH5627=m ++CONFIG_SENSORS_SCH5636=m ++CONFIG_SENSORS_ADC128D818=m ++CONFIG_SENSORS_ADS7828=m ++CONFIG_SENSORS_AMC6821=m ++CONFIG_SENSORS_INA209=m ++CONFIG_SENSORS_INA2XX=m ++CONFIG_SENSORS_INA3221=m ++CONFIG_SENSORS_TC74=m ++CONFIG_SENSORS_THMC50=m ++CONFIG_SENSORS_TMP102=m ++CONFIG_SENSORS_TMP103=m ++CONFIG_SENSORS_TMP108=m ++CONFIG_SENSORS_TMP401=m ++CONFIG_SENSORS_TMP421=m ++CONFIG_SENSORS_VEXPRESS=m ++CONFIG_SENSORS_VIA686A=m ++CONFIG_SENSORS_VT1211=m ++CONFIG_SENSORS_VT8231=m ++CONFIG_SENSORS_W83781D=m ++CONFIG_SENSORS_W83791D=m ++CONFIG_SENSORS_W83792D=m ++CONFIG_SENSORS_W83793=m ++CONFIG_SENSORS_W83795=m ++CONFIG_SENSORS_W83L785TS=m ++CONFIG_SENSORS_W83L786NG=m ++CONFIG_SENSORS_W83627HF=m ++CONFIG_SENSORS_W83627EHF=m ++CONFIG_SENSORS_ACPI_POWER=m ++CONFIG_THERMAL_WRITABLE_TRIPS=y ++CONFIG_THERMAL_GOV_FAIR_SHARE=y ++CONFIG_THERMAL_GOV_BANG_BANG=y ++CONFIG_THERMAL_GOV_USER_SPACE=y ++CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y ++CONFIG_CPU_THERMAL=y ++CONFIG_CLOCK_THERMAL=y ++CONFIG_DEVFREQ_THERMAL=y ++CONFIG_THERMAL_EMULATION=y ++CONFIG_MAX77620_THERMAL=m ++CONFIG_ROCKCHIP_THERMAL=m ++CONFIG_GENERIC_ADC_THERMAL=m ++CONFIG_WATCHDOG=y ++CONFIG_WATCHDOG_CORE=y ++CONFIG_SOFT_WATCHDOG=m ++CONFIG_GPIO_WATCHDOG=m ++CONFIG_ARM_SP805_WATCHDOG=m ++CONFIG_ARM_SBSA_WATCHDOG=m ++CONFIG_DW_WATCHDOG=m ++CONFIG_MAX77620_WATCHDOG=m ++CONFIG_ALIM7101_WDT=m ++CONFIG_I6300ESB_WDT=m ++CONFIG_PCIPCWATCHDOG=m ++CONFIG_WDTPCI=m ++CONFIG_USBPCWATCHDOG=m ++CONFIG_SSB_DRIVER_GPIO=y ++CONFIG_BCMA_DRIVER_GMAC_CMN=y ++CONFIG_BCMA_DRIVER_GPIO=y ++CONFIG_MFD_AXP20X_I2C=y ++CONFIG_MFD_MAX77620=y ++CONFIG_MFD_VIPERBOARD=m ++CONFIG_MFD_RK808=y ++CONFIG_MFD_SEC_CORE=y ++CONFIG_MFD_SM501=m ++CONFIG_MFD_SM501_GPIO=y ++CONFIG_MFD_VX855=m ++CONFIG_REGULATOR_FIXED_VOLTAGE=y ++CONFIG_REGULATOR_AXP20X=y ++CONFIG_REGULATOR_FAN53555=y ++CONFIG_REGULATOR_GPIO=y ++CONFIG_REGULATOR_MAX77620=y ++CONFIG_REGULATOR_PFUZE100=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_REGULATOR_QCOM_SPMI=y ++CONFIG_REGULATOR_RK808=y ++CONFIG_REGULATOR_S2MPS11=y ++CONFIG_REGULATOR_VCTRL=y ++CONFIG_REGULATOR_VEXPRESS=y ++CONFIG_LIRC=y ++CONFIG_RC_DECODERS=y ++CONFIG_IR_NEC_DECODER=m ++CONFIG_IR_RC5_DECODER=m ++CONFIG_IR_RC6_DECODER=m ++CONFIG_IR_JVC_DECODER=m ++CONFIG_IR_SONY_DECODER=m ++CONFIG_IR_SANYO_DECODER=m ++CONFIG_IR_SHARP_DECODER=m ++CONFIG_IR_MCE_KBD_DECODER=m ++CONFIG_IR_XMP_DECODER=m ++CONFIG_IR_IMON_DECODER=m ++CONFIG_IR_RCMM_DECODER=m ++CONFIG_RC_DEVICES=y ++CONFIG_RC_ATI_REMOTE=m ++CONFIG_IR_ENE=m ++CONFIG_IR_HIX5HD2=m ++CONFIG_IR_IMON=m ++CONFIG_IR_IMON_RAW=m ++CONFIG_IR_MCEUSB=m ++CONFIG_IR_ITE_CIR=m ++CONFIG_IR_FINTEK=m ++CONFIG_IR_NUVOTON=m ++CONFIG_IR_REDRAT3=m ++CONFIG_IR_SPI=m ++CONFIG_IR_STREAMZAP=m ++CONFIG_IR_IGORPLUGUSB=m ++CONFIG_IR_IGUANA=m ++CONFIG_IR_TTUSBIR=m ++CONFIG_RC_LOOPBACK=m ++CONFIG_IR_GPIO_CIR=m ++CONFIG_IR_GPIO_TX=m ++CONFIG_IR_PWM_TX=m ++CONFIG_IR_SERIAL=m ++CONFIG_IR_SERIAL_TRANSMITTER=y ++CONFIG_IR_SIR=m ++CONFIG_MEDIA_SUPPORT=y ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_MEDIA_SDR_SUPPORT=y ++CONFIG_MEDIA_CEC_SUPPORT=y ++CONFIG_MEDIA_CEC_RC=y ++CONFIG_MEDIA_CONTROLLER_REQUEST_API=y ++CONFIG_VIDEO_V4L2_SUBDEV_API=y ++CONFIG_DVB_MAX_ADAPTERS=8 ++CONFIG_DVB_DYNAMIC_MINORS=y ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_M5602=m ++CONFIG_USB_STV06XX=m ++CONFIG_USB_GL860=m ++CONFIG_USB_GSPCA_BENQ=m ++CONFIG_USB_GSPCA_CONEX=m ++CONFIG_USB_GSPCA_CPIA1=m ++CONFIG_USB_GSPCA_DTCS033=m ++CONFIG_USB_GSPCA_ETOMS=m ++CONFIG_USB_GSPCA_FINEPIX=m ++CONFIG_USB_GSPCA_JEILINJ=m ++CONFIG_USB_GSPCA_JL2005BCD=m ++CONFIG_USB_GSPCA_KINECT=m ++CONFIG_USB_GSPCA_KONICA=m ++CONFIG_USB_GSPCA_MARS=m ++CONFIG_USB_GSPCA_MR97310A=m ++CONFIG_USB_GSPCA_NW80X=m ++CONFIG_USB_GSPCA_OV519=m ++CONFIG_USB_GSPCA_OV534=m ++CONFIG_USB_GSPCA_OV534_9=m ++CONFIG_USB_GSPCA_PAC207=m ++CONFIG_USB_GSPCA_PAC7302=m ++CONFIG_USB_GSPCA_PAC7311=m ++CONFIG_USB_GSPCA_SE401=m ++CONFIG_USB_GSPCA_SN9C2028=m ++CONFIG_USB_GSPCA_SN9C20X=m ++CONFIG_USB_GSPCA_SONIXB=m ++CONFIG_USB_GSPCA_SONIXJ=m ++CONFIG_USB_GSPCA_SPCA500=m ++CONFIG_USB_GSPCA_SPCA501=m ++CONFIG_USB_GSPCA_SPCA505=m ++CONFIG_USB_GSPCA_SPCA506=m ++CONFIG_USB_GSPCA_SPCA508=m ++CONFIG_USB_GSPCA_SPCA561=m ++CONFIG_USB_GSPCA_SPCA1528=m ++CONFIG_USB_GSPCA_SQ905=m ++CONFIG_USB_GSPCA_SQ905C=m ++CONFIG_USB_GSPCA_SQ930X=m ++CONFIG_USB_GSPCA_STK014=m ++CONFIG_USB_GSPCA_STK1135=m ++CONFIG_USB_GSPCA_STV0680=m ++CONFIG_USB_GSPCA_SUNPLUS=m ++CONFIG_USB_GSPCA_T613=m ++CONFIG_USB_GSPCA_TOPRO=m ++CONFIG_USB_GSPCA_TOUPTEK=m ++CONFIG_USB_GSPCA_TV8532=m ++CONFIG_USB_GSPCA_VC032X=m ++CONFIG_USB_GSPCA_VICAM=m ++CONFIG_USB_GSPCA_XIRLINK_CIT=m ++CONFIG_USB_GSPCA_ZC3XX=m ++CONFIG_USB_PWC=m ++CONFIG_VIDEO_CPIA2=m ++CONFIG_USB_ZR364XX=m ++CONFIG_USB_STKWEBCAM=m ++CONFIG_USB_S2255=m ++CONFIG_VIDEO_USBTV=m ++CONFIG_VIDEO_PVRUSB2=m ++CONFIG_VIDEO_HDPVR=m ++CONFIG_VIDEO_USBVISION=m ++CONFIG_VIDEO_STK1160_COMMON=m ++CONFIG_VIDEO_GO7007=m ++CONFIG_VIDEO_GO7007_USB=m ++CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m ++CONFIG_VIDEO_AU0828=m ++CONFIG_VIDEO_AU0828_RC=y ++CONFIG_VIDEO_CX231XX=m ++CONFIG_VIDEO_CX231XX_ALSA=m ++CONFIG_VIDEO_CX231XX_DVB=m ++CONFIG_VIDEO_TM6000=m ++CONFIG_VIDEO_TM6000_ALSA=m ++CONFIG_VIDEO_TM6000_DVB=m ++CONFIG_DVB_USB=m ++CONFIG_DVB_USB_A800=m ++CONFIG_DVB_USB_DIBUSB_MB=m ++CONFIG_DVB_USB_DIBUSB_MC=m ++CONFIG_DVB_USB_DIB0700=m ++CONFIG_DVB_USB_UMT_010=m ++CONFIG_DVB_USB_CXUSB=m ++CONFIG_DVB_USB_M920X=m ++CONFIG_DVB_USB_DIGITV=m ++CONFIG_DVB_USB_VP7045=m ++CONFIG_DVB_USB_VP702X=m ++CONFIG_DVB_USB_GP8PSK=m ++CONFIG_DVB_USB_NOVA_T_USB2=m ++CONFIG_DVB_USB_TTUSB2=m ++CONFIG_DVB_USB_DTT200U=m ++CONFIG_DVB_USB_OPERA1=m ++CONFIG_DVB_USB_AF9005=m ++CONFIG_DVB_USB_AF9005_REMOTE=m ++CONFIG_DVB_USB_PCTV452E=m ++CONFIG_DVB_USB_DW2102=m ++CONFIG_DVB_USB_CINERGY_T2=m ++CONFIG_DVB_USB_DTV5100=m ++CONFIG_DVB_USB_AZ6027=m ++CONFIG_DVB_USB_TECHNISAT_USB2=m ++CONFIG_DVB_USB_V2=m ++CONFIG_DVB_USB_AF9015=m ++CONFIG_DVB_USB_AF9035=m ++CONFIG_DVB_USB_ANYSEE=m ++CONFIG_DVB_USB_AU6610=m ++CONFIG_DVB_USB_AZ6007=m ++CONFIG_DVB_USB_CE6230=m ++CONFIG_DVB_USB_EC168=m ++CONFIG_DVB_USB_GL861=m ++CONFIG_DVB_USB_LME2510=m ++CONFIG_DVB_USB_MXL111SF=m ++CONFIG_DVB_USB_RTL28XXU=m ++CONFIG_DVB_USB_DVBSKY=m ++CONFIG_DVB_USB_ZD1301=m ++CONFIG_DVB_TTUSB_BUDGET=m ++CONFIG_DVB_TTUSB_DEC=m ++CONFIG_SMS_USB_DRV=m ++CONFIG_DVB_B2C2_FLEXCOP_USB=m ++CONFIG_DVB_AS102=m ++CONFIG_VIDEO_EM28XX=m ++CONFIG_VIDEO_EM28XX_V4L2=m ++CONFIG_VIDEO_EM28XX_ALSA=m ++CONFIG_VIDEO_EM28XX_DVB=m ++CONFIG_USB_AIRSPY=m ++CONFIG_USB_HACKRF=m ++CONFIG_USB_PULSE8_CEC=m ++CONFIG_USB_RAINSHADOW_CEC=m ++CONFIG_MEDIA_PCI_SUPPORT=y ++CONFIG_VIDEO_SOLO6X10=m ++CONFIG_VIDEO_TW68=m ++CONFIG_VIDEO_IVTV=m ++CONFIG_VIDEO_IVTV_ALSA=m ++CONFIG_VIDEO_FB_IVTV=m ++CONFIG_VIDEO_HEXIUM_GEMINI=m ++CONFIG_VIDEO_HEXIUM_ORION=m ++CONFIG_VIDEO_MXB=m ++CONFIG_VIDEO_DT3155=m ++CONFIG_VIDEO_CX18=m ++CONFIG_VIDEO_CX18_ALSA=m ++CONFIG_VIDEO_CX23885=m ++CONFIG_MEDIA_ALTERA_CI=m ++CONFIG_VIDEO_CX25821=m ++CONFIG_VIDEO_CX25821_ALSA=m ++CONFIG_VIDEO_CX88=m ++CONFIG_VIDEO_CX88_ALSA=m ++CONFIG_VIDEO_CX88_BLACKBIRD=m ++CONFIG_VIDEO_CX88_DVB=m ++CONFIG_VIDEO_BT848=m ++CONFIG_DVB_BT8XX=m ++CONFIG_VIDEO_SAA7134=m ++CONFIG_VIDEO_SAA7134_ALSA=m ++CONFIG_VIDEO_SAA7134_DVB=m ++CONFIG_VIDEO_SAA7134_GO7007=m ++CONFIG_VIDEO_SAA7164=m ++CONFIG_DVB_AV7110=m ++CONFIG_DVB_BUDGET_CORE=m ++CONFIG_DVB_BUDGET=m ++CONFIG_DVB_BUDGET_CI=m ++CONFIG_DVB_BUDGET_AV=m ++CONFIG_DVB_BUDGET_PATCH=m ++CONFIG_DVB_B2C2_FLEXCOP_PCI=m ++CONFIG_DVB_PLUTO2=m ++CONFIG_DVB_DM1105=m ++CONFIG_DVB_PT1=m ++CONFIG_DVB_PT3=m ++CONFIG_MANTIS_CORE=m ++CONFIG_DVB_MANTIS=m ++CONFIG_DVB_HOPPER=m ++CONFIG_DVB_NGENE=m ++CONFIG_DVB_DDBRIDGE=m ++CONFIG_DVB_SMIPCIE=m ++CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_V4L_MEM2MEM_DRIVERS=y ++CONFIG_VIDEO_ROCKCHIP_RGA=m ++CONFIG_SMS_SDIO_DRV=m ++CONFIG_RADIO_SI470X=m ++CONFIG_USB_SI470X=m ++CONFIG_I2C_SI470X=m ++CONFIG_RADIO_SI4713=m ++CONFIG_USB_SI4713=m ++CONFIG_PLATFORM_SI4713=m ++CONFIG_USB_MR800=m ++CONFIG_USB_DSBR=m ++CONFIG_RADIO_MAXIRADIO=m ++CONFIG_RADIO_SHARK=m ++CONFIG_RADIO_SHARK2=m ++CONFIG_USB_KEENE=m ++CONFIG_USB_RAREMONO=m ++CONFIG_USB_MA901=m ++CONFIG_RADIO_TEA5764=m ++CONFIG_RADIO_SAA7706H=m ++CONFIG_RADIO_TEF6862=m ++CONFIG_RADIO_WL1273=m ++CONFIG_DRM=m ++CONFIG_DRM_LOAD_EDID_FIRMWARE=y ++CONFIG_DRM_I2C_NXP_TDA998X=m ++CONFIG_DRM_HDLCD=m ++CONFIG_DRM_MALI_DISPLAY=m ++CONFIG_DRM_RADEON=m ++CONFIG_DRM_RADEON_USERPTR=y ++CONFIG_DRM_AMDGPU=m ++CONFIG_DRM_NOUVEAU=m ++CONFIG_DRM_VGEM=m ++CONFIG_DRM_ROCKCHIP=m ++CONFIG_ROCKCHIP_ANALOGIX_DP=y ++CONFIG_ROCKCHIP_CDN_DP=y ++CONFIG_ROCKCHIP_DW_HDMI=y ++CONFIG_ROCKCHIP_DW_MIPI_DSI=y ++CONFIG_ROCKCHIP_INNO_HDMI=y ++CONFIG_ROCKCHIP_LVDS=y ++CONFIG_ROCKCHIP_RGB=y ++CONFIG_DRM_UDL=m ++CONFIG_DRM_AST=m ++CONFIG_DRM_MGAG200=m ++CONFIG_DRM_CIRRUS_QEMU=m ++CONFIG_DRM_QXL=m ++CONFIG_DRM_BOCHS=m ++CONFIG_DRM_VIRTIO_GPU=m ++CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m ++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m ++CONFIG_DRM_ANALOGIX_ANX78XX=m ++CONFIG_DRM_NXP_PTN3460=m ++CONFIG_DRM_PARADE_PS8622=m ++CONFIG_DRM_SIL_SII8620=m ++CONFIG_DRM_SII902X=m ++CONFIG_DRM_TOSHIBA_TC358767=m ++CONFIG_DRM_TI_TFP410=m ++CONFIG_DRM_I2C_ADV7511=m ++CONFIG_DRM_I2C_ADV7511_AUDIO=y ++CONFIG_DRM_DW_HDMI_CEC=m ++CONFIG_DRM_HISI_KIRIN=m ++CONFIG_DRM_PL111=m ++CONFIG_DRM_PANFROST=m ++CONFIG_FB=y ++CONFIG_FIRMWARE_EDID=y ++CONFIG_FB_TILEBLITTING=y ++CONFIG_FB_UDL=m ++CONFIG_FB_VIRTUAL=m ++CONFIG_FB_SIMPLE=y ++CONFIG_FB_SSD1307=m ++CONFIG_LCD_CLASS_DEVICE=m ++CONFIG_LCD_PLATFORM=m ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_GENERIC=m ++CONFIG_BACKLIGHT_PWM=m ++CONFIG_BACKLIGHT_LP855X=m ++CONFIG_BACKLIGHT_GPIO=m ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_OSSEMUL=y ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_HRTIMER=m ++# CONFIG_SND_SUPPORT_OLD_API is not set ++CONFIG_SND_SEQUENCER=m ++CONFIG_SND_SEQ_DUMMY=m ++CONFIG_SND_SEQUENCER_OSS=m ++CONFIG_SND_DUMMY=m ++CONFIG_SND_ALOOP=m ++CONFIG_SND_VIRMIDI=m ++CONFIG_SND_MTPAV=m ++CONFIG_SND_SERIAL_U16550=m ++CONFIG_SND_MPU401=m ++CONFIG_SND_AC97_POWER_SAVE=y ++CONFIG_SND_AD1889=m ++CONFIG_SND_ATIIXP=m ++CONFIG_SND_ATIIXP_MODEM=m ++CONFIG_SND_AU8810=m ++CONFIG_SND_AU8820=m ++CONFIG_SND_AU8830=m ++CONFIG_SND_BT87X=m ++CONFIG_SND_CA0106=m ++CONFIG_SND_CMIPCI=m ++CONFIG_SND_OXYGEN=m ++CONFIG_SND_CS4281=m ++CONFIG_SND_CS46XX=m ++CONFIG_SND_CTXFI=m ++CONFIG_SND_DARLA20=m ++CONFIG_SND_GINA20=m ++CONFIG_SND_LAYLA20=m ++CONFIG_SND_DARLA24=m ++CONFIG_SND_GINA24=m ++CONFIG_SND_LAYLA24=m ++CONFIG_SND_MONA=m ++CONFIG_SND_MIA=m ++CONFIG_SND_ECHO3G=m ++CONFIG_SND_INDIGO=m ++CONFIG_SND_INDIGOIO=m ++CONFIG_SND_INDIGODJ=m ++CONFIG_SND_INDIGOIOX=m ++CONFIG_SND_INDIGODJX=m ++CONFIG_SND_ENS1370=m ++CONFIG_SND_ENS1371=m ++CONFIG_SND_FM801=m ++CONFIG_SND_FM801_TEA575X_BOOL=y ++CONFIG_SND_HDSP=m ++CONFIG_SND_HDSPM=m ++CONFIG_SND_ICE1724=m ++CONFIG_SND_INTEL8X0=m ++CONFIG_SND_INTEL8X0M=m ++CONFIG_SND_KORG1212=m ++CONFIG_SND_LOLA=m ++CONFIG_SND_LX6464ES=m ++CONFIG_SND_MIXART=m ++CONFIG_SND_NM256=m ++CONFIG_SND_PCXHR=m ++CONFIG_SND_RIPTIDE=m ++CONFIG_SND_RME32=m ++CONFIG_SND_RME96=m ++CONFIG_SND_RME9652=m ++CONFIG_SND_VIA82XX=m ++CONFIG_SND_VIA82XX_MODEM=m ++CONFIG_SND_VIRTUOSO=m ++CONFIG_SND_VX222=m ++CONFIG_SND_YMFPCI=m ++CONFIG_SND_HDA_INTEL=m ++CONFIG_SND_HDA_HWDEP=y ++CONFIG_SND_HDA_INPUT_BEEP=y ++CONFIG_SND_HDA_INPUT_BEEP_MODE=0 ++CONFIG_SND_HDA_PATCH_LOADER=y ++CONFIG_SND_HDA_CODEC_REALTEK=m ++CONFIG_SND_HDA_CODEC_ANALOG=m ++CONFIG_SND_HDA_CODEC_SIGMATEL=m ++CONFIG_SND_HDA_CODEC_VIA=m ++CONFIG_SND_HDA_CODEC_HDMI=m ++CONFIG_SND_HDA_CODEC_CIRRUS=m ++CONFIG_SND_HDA_CODEC_CONEXANT=m ++CONFIG_SND_HDA_CODEC_CA0110=m ++CONFIG_SND_HDA_CODEC_CA0132=m ++CONFIG_SND_HDA_CODEC_CA0132_DSP=y ++CONFIG_SND_HDA_CODEC_CMEDIA=m ++CONFIG_SND_HDA_CODEC_SI3054=m ++CONFIG_SND_HDA_PREALLOC_SIZE=4096 ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_USB_UA101=m ++CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_CAIAQ_INPUT=y ++CONFIG_SND_USB_6FIRE=m ++CONFIG_SND_USB_HIFACE=m ++CONFIG_SND_USB_POD=m ++CONFIG_SND_USB_PODHD=m ++CONFIG_SND_USB_TONEPORT=m ++CONFIG_SND_USB_VARIAX=m ++CONFIG_SND_SOC=y ++CONFIG_SND_SOC_AMD_ACP=m ++CONFIG_SND_I2S_HI6210_I2S=m ++CONFIG_SND_SOC_ROCKCHIP=m ++CONFIG_SND_SOC_ROCKCHIP_PDM=m ++CONFIG_SND_SOC_ROCKCHIP_SPDIF=m ++CONFIG_SND_SOC_ROCKCHIP_MAX98090=m ++CONFIG_SND_SOC_ROCKCHIP_RT5645=m ++CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m ++CONFIG_SND_SOC_RK3399_GRU_SOUND=m ++CONFIG_SND_SOC_CROS_EC_CODEC=m ++CONFIG_SND_SOC_MSM8916_WCD_ANALOG=y ++CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=y ++CONFIG_SND_SOC_PCM3168A_I2C=m ++CONFIG_SND_SOC_RK3328=m ++CONFIG_SND_SIMPLE_CARD=m ++CONFIG_SND_AUDIO_GRAPH_CARD=m ++CONFIG_HID_BATTERY_STRENGTH=y ++CONFIG_HIDRAW=y ++CONFIG_UHID=m ++CONFIG_HID_A4TECH=m ++CONFIG_HID_ACCUTOUCH=m ++CONFIG_HID_ACRUX=m ++CONFIG_HID_ACRUX_FF=y ++CONFIG_HID_APPLE=m ++CONFIG_HID_APPLEIR=m ++CONFIG_HID_AUREAL=m ++CONFIG_HID_BELKIN=m ++CONFIG_HID_BETOP_FF=m ++CONFIG_HID_CHERRY=m ++CONFIG_HID_CHICONY=m ++CONFIG_HID_CORSAIR=m ++CONFIG_HID_COUGAR=m ++CONFIG_HID_MACALLY=m ++CONFIG_HID_PRODIKEYS=m ++CONFIG_HID_CMEDIA=m ++CONFIG_HID_CP2112=m ++CONFIG_HID_CYPRESS=m ++CONFIG_HID_DRAGONRISE=m ++CONFIG_DRAGONRISE_FF=y ++CONFIG_HID_EMS_FF=m ++CONFIG_HID_ELECOM=m ++CONFIG_HID_ELO=m ++CONFIG_HID_EZKEY=m ++CONFIG_HID_GEMBIRD=m ++CONFIG_HID_GFRM=m ++CONFIG_HID_HOLTEK=m ++CONFIG_HOLTEK_FF=y ++CONFIG_HID_GT683R=m ++CONFIG_HID_KEYTOUCH=m ++CONFIG_HID_KYE=m ++CONFIG_HID_UCLOGIC=m ++CONFIG_HID_WALTOP=m ++CONFIG_HID_VIEWSONIC=m ++CONFIG_HID_GYRATION=m ++CONFIG_HID_ICADE=m ++CONFIG_HID_ITE=m ++CONFIG_HID_JABRA=m ++CONFIG_HID_TWINHAN=m ++CONFIG_HID_KENSINGTON=m ++CONFIG_HID_LCPOWER=m ++CONFIG_HID_LENOVO=m ++CONFIG_HID_LOGITECH=m ++CONFIG_HID_LOGITECH_DJ=m ++CONFIG_LOGITECH_FF=y ++CONFIG_LOGIRUMBLEPAD2_FF=y ++CONFIG_LOGIG940_FF=y ++CONFIG_HID_MAGICMOUSE=m ++CONFIG_HID_MALTRON=m ++CONFIG_HID_MAYFLASH=m ++CONFIG_HID_REDRAGON=m ++CONFIG_HID_MICROSOFT=m ++CONFIG_HID_MONTEREY=m ++CONFIG_HID_MULTITOUCH=m ++CONFIG_HID_NTI=m ++CONFIG_HID_NTRIG=m ++CONFIG_HID_ORTEK=m ++CONFIG_HID_PANTHERLORD=m ++CONFIG_PANTHERLORD_FF=y ++CONFIG_HID_PENMOUNT=m ++CONFIG_HID_PETALYNX=m ++CONFIG_HID_PICOLCD=m ++CONFIG_HID_PICOLCD_FB=y ++CONFIG_HID_PICOLCD_BACKLIGHT=y ++CONFIG_HID_PICOLCD_LCD=y ++CONFIG_HID_PICOLCD_LEDS=y ++CONFIG_HID_PICOLCD_CIR=y ++CONFIG_HID_PLANTRONICS=m ++CONFIG_HID_PRIMAX=m ++CONFIG_HID_RETRODE=m ++CONFIG_HID_ROCCAT=m ++CONFIG_HID_SAITEK=m ++CONFIG_HID_SAMSUNG=m ++CONFIG_HID_SONY=m ++CONFIG_SONY_FF=y ++CONFIG_HID_SPEEDLINK=m ++CONFIG_HID_STEAM=m ++CONFIG_HID_STEELSERIES=m ++CONFIG_HID_SUNPLUS=m ++CONFIG_HID_RMI=m ++CONFIG_HID_GREENASIA=m ++CONFIG_GREENASIA_FF=y ++CONFIG_HID_SMARTJOYPLUS=m ++CONFIG_SMARTJOYPLUS_FF=y ++CONFIG_HID_TIVO=m ++CONFIG_HID_TOPSEED=m ++CONFIG_HID_THINGM=m ++CONFIG_HID_THRUSTMASTER=m ++CONFIG_THRUSTMASTER_FF=y ++CONFIG_HID_UDRAW_PS3=m ++CONFIG_HID_U2FZERO=m ++CONFIG_HID_WACOM=m ++CONFIG_HID_WIIMOTE=m ++CONFIG_HID_XINMO=m ++CONFIG_HID_ZEROPLUS=m ++CONFIG_ZEROPLUS_FF=y ++CONFIG_HID_ZYDACRON=m ++CONFIG_HID_SENSOR_HUB=m ++CONFIG_HID_SENSOR_CUSTOM_SENSOR=m ++CONFIG_HID_ALPS=m ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y ++CONFIG_I2C_HID=m ++CONFIG_USB_LED_TRIG=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_OTG=y ++CONFIG_USB_MON=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_HCD_PLATFORM=y ++CONFIG_USB_MAX3421_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_HCD_PLATFORM=y ++CONFIG_USB_UHCI_HCD=y ++CONFIG_USB_U132_HCD=m ++CONFIG_USB_SL811_HCD=m ++CONFIG_USB_SL811_HCD_ISO=y ++CONFIG_USB_PRINTER=m ++CONFIG_USB_TMC=m ++CONFIG_USB_STORAGE=y ++CONFIG_USB_STORAGE_REALTEK=y ++CONFIG_USB_STORAGE_DATAFAB=y ++CONFIG_USB_STORAGE_FREECOM=y ++CONFIG_USB_STORAGE_ISD200=y ++CONFIG_USB_STORAGE_USBAT=y ++CONFIG_USB_STORAGE_SDDR09=y ++CONFIG_USB_STORAGE_SDDR55=y ++CONFIG_USB_STORAGE_JUMPSHOT=y ++CONFIG_USB_STORAGE_ALAUDA=y ++CONFIG_USB_STORAGE_ONETOUCH=y ++CONFIG_USB_STORAGE_KARMA=y ++CONFIG_USB_STORAGE_CYPRESS_ATACB=y ++CONFIG_USB_STORAGE_ENE_UB6250=y ++CONFIG_USB_UAS=y ++CONFIG_USB_MDC800=m ++CONFIG_USB_MICROTEK=m ++CONFIG_USBIP_CORE=m ++CONFIG_USBIP_VHCI_HCD=m ++CONFIG_USBIP_HOST=m ++CONFIG_USBIP_VUDC=m ++CONFIG_USB_MUSB_HDRC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_ULPI=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_DWC2_PCI=y ++CONFIG_USB_CHIPIDEA=y ++CONFIG_USB_CHIPIDEA_UDC=y ++CONFIG_USB_CHIPIDEA_HOST=y ++CONFIG_USB_ISP1760=y ++CONFIG_USB_SERIAL=y ++CONFIG_USB_SERIAL_CONSOLE=y ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_SIMPLE=m ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++CONFIG_USB_SERIAL_CH341=m ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_F81232=m ++CONFIG_USB_SERIAL_F8153X=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++CONFIG_USB_SERIAL_IUU=m ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_METRO=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++CONFIG_USB_SERIAL_MXUPORT=m ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++CONFIG_USB_SERIAL_OTI6858=m ++CONFIG_USB_SERIAL_QCAUX=m ++CONFIG_USB_SERIAL_QUALCOMM=m ++CONFIG_USB_SERIAL_SPCP8X5=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SAFE_PADDED=y ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_SYMBOL=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++CONFIG_USB_SERIAL_OPTICON=m ++CONFIG_USB_SERIAL_XSENS_MT=m ++CONFIG_USB_SERIAL_WISHBONE=m ++CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_QT2=m ++CONFIG_USB_SERIAL_UPD78F0730=m ++CONFIG_USB_SERIAL_DEBUG=m ++CONFIG_USB_EMI62=m ++CONFIG_USB_EMI26=m ++CONFIG_USB_ADUTUX=m ++CONFIG_USB_SEVSEG=m ++CONFIG_USB_LEGOTOWER=m ++CONFIG_USB_LCD=m ++CONFIG_USB_IDMOUSE=m ++CONFIG_USB_FTDI_ELAN=m ++CONFIG_USB_APPLEDISPLAY=m ++CONFIG_USB_SISUSBVGA=m ++CONFIG_USB_SISUSBVGA_CON=y ++CONFIG_USB_LD=m ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++CONFIG_USB_ISIGHTFW=m ++CONFIG_USB_YUREX=m ++CONFIG_USB_HSIC_USB3503=y ++CONFIG_USB_HSIC_USB4604=y ++CONFIG_USB_CHAOSKEY=m ++CONFIG_USB_ATM=m ++CONFIG_USB_CXACRU=m ++CONFIG_USB_UEAGLEATM=m ++CONFIG_USB_XUSBATM=m ++CONFIG_USB_GPIO_VBUS=y ++CONFIG_USB_ISP1301=y ++CONFIG_USB_ULPI=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VBUS_DRAW=500 ++CONFIG_USB_CONFIGFS=m ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++CONFIG_USB_CONFIGFS_OBEX=y ++CONFIG_USB_CONFIGFS_NCM=y ++CONFIG_USB_CONFIGFS_ECM=y ++CONFIG_USB_CONFIGFS_ECM_SUBSET=y ++CONFIG_USB_CONFIGFS_RNDIS=y ++CONFIG_USB_CONFIGFS_EEM=y ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_FS=y ++CONFIG_USB_CONFIGFS_F_UAC1=y ++CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y ++CONFIG_USB_CONFIGFS_F_UAC2=y ++CONFIG_USB_CONFIGFS_F_MIDI=y ++CONFIG_USB_CONFIGFS_F_HID=y ++CONFIG_USB_CONFIGFS_F_UVC=y ++CONFIG_USB_CONFIGFS_F_PRINTER=y ++CONFIG_USB_CONFIGFS_F_TCM=y ++CONFIG_USB_AUDIO=m ++CONFIG_GADGET_UAC1=y ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_EEM=y ++CONFIG_USB_G_NCM=m ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_FUNCTIONFS=m ++CONFIG_USB_FUNCTIONFS_ETH=y ++CONFIG_USB_FUNCTIONFS_RNDIS=y ++CONFIG_USB_FUNCTIONFS_GENERIC=y ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_GADGET_TARGET=m ++CONFIG_USB_G_SERIAL=m ++CONFIG_USB_MIDI_GADGET=m ++CONFIG_USB_G_PRINTER=m ++CONFIG_USB_CDC_COMPOSITE=m ++CONFIG_USB_G_ACM_MS=m ++CONFIG_USB_G_MULTI=m ++CONFIG_USB_G_MULTI_CDC=y ++CONFIG_USB_G_HID=m ++CONFIG_USB_G_WEBCAM=m ++CONFIG_TYPEC=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_TCPCI=y ++CONFIG_TYPEC_FUSB302=y ++CONFIG_MMC=y ++CONFIG_PWRSEQ_SD8787=m ++CONFIG_MMC_BLOCK_MINORS=32 ++CONFIG_SDIO_UART=m ++CONFIG_MMC_ARMMMCI=y ++# CONFIG_MMC_STM32_SDMMC is not set ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PCI=y ++CONFIG_MMC_SDHCI_ACPI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_OF_ARASAN=y ++CONFIG_MMC_SDHCI_OF_AT91=y ++CONFIG_MMC_SDHCI_CADENCE=y ++CONFIG_MMC_SDHCI_F_SDH30=y ++CONFIG_MMC_TIFM_SD=y ++CONFIG_MMC_SPI=y ++CONFIG_MMC_CB710=y ++CONFIG_MMC_VIA_SDMMC=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_EXYNOS=y ++CONFIG_MMC_DW_K3=y ++CONFIG_MMC_DW_PCI=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_VUB300=m ++CONFIG_MMC_USHC=m ++CONFIG_MMC_USDHI6ROL0=y ++CONFIG_MMC_TOSHIBA_PCI=y ++CONFIG_MMC_MTK=y ++CONFIG_MMC_SDHCI_XENON=y ++CONFIG_MEMSTICK=m ++CONFIG_MSPRO_BLOCK=m ++CONFIG_MEMSTICK_TIFM_MS=m ++CONFIG_MEMSTICK_JMICRON_38X=m ++CONFIG_MEMSTICK_R592=m ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_CLASS_FLASH=m ++CONFIG_LEDS_LM3530=m ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_LP3944=m ++CONFIG_LEDS_PCA955X=m ++CONFIG_LEDS_PCA963X=m ++CONFIG_LEDS_PWM=m ++CONFIG_LEDS_LT3593=m ++CONFIG_LEDS_BLINKM=m ++CONFIG_LEDS_SYSCON=y ++CONFIG_LEDS_USER=m ++CONFIG_LEDS_TRIGGER_TIMER=y ++CONFIG_LEDS_TRIGGER_ONESHOT=y ++CONFIG_LEDS_TRIGGER_DISK=y ++CONFIG_LEDS_TRIGGER_MTD=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_LEDS_TRIGGER_BACKLIGHT=y ++CONFIG_LEDS_TRIGGER_CPU=y ++CONFIG_LEDS_TRIGGER_ACTIVITY=y ++CONFIG_LEDS_TRIGGER_GPIO=y ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y ++CONFIG_LEDS_TRIGGER_TRANSIENT=y ++CONFIG_LEDS_TRIGGER_CAMERA=y ++CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_LEDS_TRIGGER_NETDEV=y ++CONFIG_LEDS_TRIGGER_PATTERN=m ++CONFIG_LEDS_TRIGGER_AUDIO=m ++CONFIG_ACCESSIBILITY=y ++CONFIG_A11Y_BRAILLE_CONSOLE=y ++CONFIG_EDAC=y ++CONFIG_EDAC_XGENE=m ++CONFIG_RTC_CLASS=y ++# CONFIG_RTC_SYSTOHC is not set ++CONFIG_RTC_INTF_DEV_UIE_EMUL=y ++CONFIG_RTC_DRV_ABX80X=m ++CONFIG_RTC_DRV_DS1307=m ++CONFIG_RTC_DRV_DS1374=m ++CONFIG_RTC_DRV_DS1374_WDT=y ++CONFIG_RTC_DRV_DS1672=m ++CONFIG_RTC_DRV_MAX6900=m ++CONFIG_RTC_DRV_RK808=m ++CONFIG_RTC_DRV_RS5C372=m ++CONFIG_RTC_DRV_ISL1208=m ++CONFIG_RTC_DRV_ISL12022=m ++CONFIG_RTC_DRV_X1205=m ++CONFIG_RTC_DRV_PCF8523=m ++CONFIG_RTC_DRV_PCF85063=m ++CONFIG_RTC_DRV_PCF85363=m ++CONFIG_RTC_DRV_PCF8563=m ++CONFIG_RTC_DRV_PCF8583=m ++CONFIG_RTC_DRV_M41T80=m ++CONFIG_RTC_DRV_M41T80_WDT=y ++CONFIG_RTC_DRV_BQ32K=m ++CONFIG_RTC_DRV_FM3130=m ++CONFIG_RTC_DRV_RX8581=m ++CONFIG_RTC_DRV_RX8025=m ++CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_DS3232=m ++CONFIG_RTC_DRV_PCF2127=m ++CONFIG_RTC_DRV_RV3029C2=m ++CONFIG_RTC_DRV_DS1286=m ++CONFIG_RTC_DRV_DS1511=m ++CONFIG_RTC_DRV_DS1553=m ++CONFIG_RTC_DRV_DS1685_FAMILY=m ++CONFIG_RTC_DRV_DS1742=m ++CONFIG_RTC_DRV_DS2404=m ++CONFIG_RTC_DRV_EFI=y ++CONFIG_RTC_DRV_STK17TA8=m ++CONFIG_RTC_DRV_M48T35=m ++CONFIG_RTC_DRV_M48T59=m ++CONFIG_RTC_DRV_MSM6242=m ++CONFIG_RTC_DRV_BQ4802=m ++CONFIG_RTC_DRV_RP5C01=m ++CONFIG_RTC_DRV_V3020=m ++CONFIG_RTC_DRV_CROS_EC=y ++CONFIG_RTC_DRV_PL031=y ++CONFIG_MV_XOR_V2=y ++CONFIG_PL330_DMA=y ++CONFIG_QCOM_HIDMA_MGMT=y ++CONFIG_QCOM_HIDMA=y ++CONFIG_DW_DMAC=m ++CONFIG_DW_DMAC_PCI=m ++CONFIG_ASYNC_TX_DMA=y ++CONFIG_AUXDISPLAY=y ++CONFIG_UIO_CIF=m ++CONFIG_UIO_AEC=m ++CONFIG_UIO_SERCOS3=m ++CONFIG_UIO_PCI_GENERIC=m ++CONFIG_VFIO=m ++CONFIG_VFIO_PCI=m ++CONFIG_VFIO_PLATFORM=m ++CONFIG_VFIO_AMBA=m ++CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET=m ++CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m ++CONFIG_VIRTIO_PCI=y ++CONFIG_VIRTIO_BALLOON=m ++CONFIG_VIRTIO_INPUT=m ++CONFIG_VIRTIO_MMIO=m ++CONFIG_STAGING=y ++CONFIG_PRISM2_USB=m ++CONFIG_RTL8192U=m ++CONFIG_RTLLIB=m ++CONFIG_RTL8192E=m ++CONFIG_R8712U=m ++CONFIG_R8188EU=m ++CONFIG_ADIS16203=m ++CONFIG_ADIS16240=m ++CONFIG_AD7816=m ++CONFIG_AD7192=m ++CONFIG_AD7280=m ++CONFIG_ADT7316=m ++CONFIG_ADT7316_I2C=m ++CONFIG_AD7150=m ++CONFIG_AD7746=m ++CONFIG_AD9832=m ++CONFIG_AD9834=m ++CONFIG_AD5933=m ++CONFIG_ADE7854=m ++CONFIG_AD2S1210=m ++CONFIG_STAGING_MEDIA=y ++CONFIG_FB_TFT=m ++CONFIG_FB_TFT_AGM1264K_FL=m ++CONFIG_FB_TFT_BD663474=m ++CONFIG_FB_TFT_HX8340BN=m ++CONFIG_FB_TFT_HX8347D=m ++CONFIG_FB_TFT_HX8353D=m ++CONFIG_FB_TFT_HX8357D=m ++CONFIG_FB_TFT_ILI9163=m ++CONFIG_FB_TFT_ILI9320=m ++CONFIG_FB_TFT_ILI9325=m ++CONFIG_FB_TFT_ILI9340=m ++CONFIG_FB_TFT_ILI9341=m ++CONFIG_FB_TFT_ILI9481=m ++CONFIG_FB_TFT_ILI9486=m ++CONFIG_FB_TFT_PCD8544=m ++CONFIG_FB_TFT_RA8875=m ++CONFIG_FB_TFT_S6D02A1=m ++CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SH1106=m ++CONFIG_FB_TFT_SSD1289=m ++CONFIG_FB_TFT_SSD1305=m ++CONFIG_FB_TFT_SSD1306=m ++CONFIG_FB_TFT_SSD1331=m ++CONFIG_FB_TFT_SSD1351=m ++CONFIG_FB_TFT_ST7735R=m ++CONFIG_FB_TFT_ST7789V=m ++CONFIG_FB_TFT_TINYLCD=m ++CONFIG_FB_TFT_TLS8204=m ++CONFIG_FB_TFT_UC1611=m ++CONFIG_FB_TFT_UC1701=m ++CONFIG_FB_TFT_UPD161704=m ++CONFIG_FB_TFT_WATTEROTT=m ++CONFIG_FB_FLEX=m ++CONFIG_USB_WUSB_CBAF=m ++CONFIG_USB_HWA_HCD=m ++CONFIG_UWB=m ++CONFIG_UWB_WHCI=m ++CONFIG_UWB_I1480U=m ++CONFIG_MFD_CROS_EC=y ++CONFIG_CHROMEOS_TBMC=m ++CONFIG_CROS_EC_I2C=y ++CONFIG_CROS_EC_RPMSG=m ++CONFIG_CROS_EC_SPI=y ++CONFIG_CROS_KBD_LED_BACKLIGHT=y ++CONFIG_CROS_EC_LIGHTBAR=m ++CONFIG_CROS_EC_VBC=m ++CONFIG_CROS_EC_DEBUGFS=m ++CONFIG_CROS_EC_SYSFS=m ++CONFIG_COMMON_CLK_VERSATILE=y ++CONFIG_CLK_SP810=y ++CONFIG_CLK_VEXPRESS_OSC=y ++CONFIG_COMMON_CLK_RK808=y ++CONFIG_COMMON_CLK_SCPI=y ++CONFIG_COMMON_CLK_XGENE=y ++CONFIG_COMMON_CLK_PWM=y ++CONFIG_HWSPINLOCK=y ++CONFIG_ARM_MHU=y ++CONFIG_PLATFORM_MHU=y ++CONFIG_ROCKCHIP_MBOX=y ++CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y ++CONFIG_ROCKCHIP_IOMMU=y ++CONFIG_ARM_SMMU=y ++CONFIG_ARM_SMMU_V3=y ++CONFIG_REMOTEPROC=y ++CONFIG_RPMSG_CHAR=y ++CONFIG_RPMSG_QCOM_GLINK_RPM=y ++CONFIG_ROCKCHIP_PM_DOMAINS=y ++CONFIG_ARM_RK3399_DMC_DEVFREQ=y ++CONFIG_EXTCON_ADC_JACK=m ++CONFIG_EXTCON_GPIO=y ++CONFIG_EXTCON_USB_GPIO=y ++CONFIG_EXTCON_USBC_CROS_EC=y ++CONFIG_MEMORY=y ++CONFIG_IIO=y ++CONFIG_IIO_BUFFER_CB=y ++CONFIG_IIO_BUFFER_HW_CONSUMER=m ++CONFIG_IIO_SW_DEVICE=m ++CONFIG_IIO_SW_TRIGGER=m ++CONFIG_ADIS16201=m ++CONFIG_ADIS16209=m ++CONFIG_ADXL345_I2C=m ++CONFIG_ADXL345_SPI=m ++CONFIG_ADXL372_SPI=m ++CONFIG_ADXL372_I2C=m ++CONFIG_BMA180=m ++CONFIG_BMA220=m ++CONFIG_BMC150_ACCEL=m ++CONFIG_DA280=m ++CONFIG_DA311=m ++CONFIG_DMARD06=m ++CONFIG_DMARD09=m ++CONFIG_DMARD10=m ++CONFIG_HID_SENSOR_ACCEL_3D=m ++CONFIG_IIO_CROS_EC_ACCEL_LEGACY=m ++CONFIG_IIO_ST_ACCEL_3AXIS=m ++CONFIG_KXSD9=m ++CONFIG_KXCJK1013=m ++CONFIG_MC3230=m ++CONFIG_MMA7455_I2C=m ++CONFIG_MMA7455_SPI=m ++CONFIG_MMA7660=m ++CONFIG_MMA8452=m ++CONFIG_MMA9551=m ++CONFIG_MMA9553=m ++CONFIG_MXC4005=m ++CONFIG_MXC6255=m ++CONFIG_SCA3000=m ++CONFIG_STK8312=m ++CONFIG_STK8BA50=m ++CONFIG_AD7124=m ++CONFIG_AD7266=m ++CONFIG_AD7291=m ++CONFIG_AD7298=m ++CONFIG_AD7476=m ++CONFIG_AD7606_IFACE_PARALLEL=m ++CONFIG_AD7606_IFACE_SPI=m ++CONFIG_AD7766=m ++CONFIG_AD7768_1=m ++CONFIG_AD7780=m ++CONFIG_AD7791=m ++CONFIG_AD7793=m ++CONFIG_AD7887=m ++CONFIG_AD7923=m ++CONFIG_AD7949=m ++CONFIG_AD799X=m ++CONFIG_AXP20X_ADC=m ++CONFIG_AXP288_ADC=m ++CONFIG_CC10001_ADC=m ++CONFIG_ENVELOPE_DETECTOR=m ++CONFIG_HI8435=m ++CONFIG_HX711=m ++CONFIG_INA2XX_ADC=m ++CONFIG_LTC2471=m ++CONFIG_LTC2485=m ++CONFIG_LTC2497=m ++CONFIG_MAX1027=m ++CONFIG_MAX11100=m ++CONFIG_MAX1118=m ++CONFIG_MAX1363=m ++CONFIG_MAX9611=m ++CONFIG_MCP320X=m ++CONFIG_MCP3422=m ++CONFIG_MCP3911=m ++CONFIG_NAU7802=m ++CONFIG_QCOM_SPMI_IADC=m ++CONFIG_QCOM_SPMI_VADC=y ++CONFIG_QCOM_SPMI_ADC5=m ++CONFIG_ROCKCHIP_SARADC=m ++CONFIG_SD_ADC_MODULATOR=m ++CONFIG_TI_ADC081C=m ++CONFIG_TI_ADC0832=m ++CONFIG_TI_ADC084S021=m ++CONFIG_TI_ADC12138=m ++CONFIG_TI_ADC108S102=m ++CONFIG_TI_ADC128S052=m ++CONFIG_TI_ADC161S626=m ++CONFIG_TI_ADS1015=m ++CONFIG_TI_ADS7950=m ++CONFIG_TI_ADS8344=m ++CONFIG_TI_ADS8688=m ++CONFIG_TI_ADS124S08=m ++CONFIG_TI_TLC4541=m ++CONFIG_VF610_ADC=m ++CONFIG_VIPERBOARD_ADC=m ++CONFIG_IIO_RESCALE=m ++CONFIG_AD8366=m ++CONFIG_ATLAS_PH_SENSOR=m ++CONFIG_BME680=m ++CONFIG_CCS811=m ++CONFIG_IAQCORE=m ++CONFIG_PMS7003=m ++CONFIG_SENSIRION_SGP30=m ++CONFIG_SPS30=m ++CONFIG_VZ89X=m ++CONFIG_IIO_CROS_EC_SENSORS_CORE=m ++CONFIG_IIO_CROS_EC_SENSORS=m ++CONFIG_AD5064=m ++CONFIG_AD5360=m ++CONFIG_AD5380=m ++CONFIG_AD5421=m ++CONFIG_AD5446=m ++CONFIG_AD5449=m ++CONFIG_AD5592R=m ++CONFIG_AD5593R=m ++CONFIG_AD5504=m ++CONFIG_AD5624R_SPI=m ++CONFIG_LTC1660=m ++CONFIG_LTC2632=m ++CONFIG_AD5686_SPI=m ++CONFIG_AD5696_I2C=m ++CONFIG_AD5755=m ++CONFIG_AD5758=m ++CONFIG_AD5761=m ++CONFIG_AD5764=m ++CONFIG_AD5791=m ++CONFIG_AD7303=m ++CONFIG_AD8801=m ++CONFIG_DPOT_DAC=m ++CONFIG_DS4424=m ++CONFIG_M62332=m ++CONFIG_MAX517=m ++CONFIG_MAX5821=m ++CONFIG_MCP4725=m ++CONFIG_MCP4922=m ++CONFIG_TI_DAC082S085=m ++CONFIG_TI_DAC5571=m ++CONFIG_TI_DAC7311=m ++CONFIG_TI_DAC7612=m ++CONFIG_VF610_DAC=m ++CONFIG_AD9523=m ++CONFIG_ADF4350=m ++CONFIG_ADIS16080=m ++CONFIG_ADIS16130=m ++CONFIG_ADIS16136=m ++CONFIG_ADIS16260=m ++CONFIG_ADXRS450=m ++CONFIG_BMG160=m ++CONFIG_FXAS21002C=m ++CONFIG_HID_SENSOR_GYRO_3D=m ++CONFIG_MPU3050_I2C=m ++CONFIG_IIO_ST_GYRO_3AXIS=m ++CONFIG_ITG3200=m ++CONFIG_AFE4403=m ++CONFIG_AFE4404=m ++CONFIG_MAX30100=m ++CONFIG_MAX30102=m ++CONFIG_AM2315=m ++CONFIG_DHT11=m ++CONFIG_HDC100X=m ++CONFIG_HID_SENSOR_HUMIDITY=m ++CONFIG_HTS221=m ++CONFIG_HTU21=m ++CONFIG_SI7005=m ++CONFIG_SI7020=m ++CONFIG_ADIS16400=m ++CONFIG_ADIS16480=m ++CONFIG_BMI160_I2C=m ++CONFIG_BMI160_SPI=m ++CONFIG_KMX61=m ++CONFIG_INV_MPU6050_I2C=m ++CONFIG_INV_MPU6050_SPI=m ++CONFIG_IIO_ST_LSM6DSX=m ++CONFIG_ACPI_ALS=m ++CONFIG_ADJD_S311=m ++CONFIG_AL3320A=m ++CONFIG_APDS9300=m ++CONFIG_APDS9960=m ++CONFIG_BH1750=m ++CONFIG_BH1780=m ++CONFIG_CM32181=m ++CONFIG_CM3232=m ++CONFIG_CM3323=m ++CONFIG_CM3605=m ++CONFIG_CM36651=m ++CONFIG_IIO_CROS_EC_LIGHT_PROX=m ++CONFIG_GP2AP020A00F=m ++CONFIG_SENSORS_ISL29018=m ++CONFIG_SENSORS_ISL29028=m ++CONFIG_ISL29125=m ++CONFIG_HID_SENSOR_ALS=m ++CONFIG_HID_SENSOR_PROX=m ++CONFIG_JSA1212=m ++CONFIG_RPR0521=m ++CONFIG_LTR501=m ++CONFIG_LV0104CS=m ++CONFIG_MAX44000=m ++CONFIG_MAX44009=m ++CONFIG_OPT3001=m ++CONFIG_PA12203001=m ++CONFIG_SI1133=m ++CONFIG_SI1145=m ++CONFIG_STK3310=m ++CONFIG_ST_UVIS25=m ++CONFIG_TCS3414=m ++CONFIG_TCS3472=m ++CONFIG_SENSORS_TSL2563=m ++CONFIG_TSL2583=m ++CONFIG_TSL2772=m ++CONFIG_TSL4531=m ++CONFIG_US5182D=m ++CONFIG_VCNL4000=m ++CONFIG_VCNL4035=m ++CONFIG_VEML6070=m ++CONFIG_VL6180=m ++CONFIG_ZOPT2201=m ++CONFIG_AK8974=m ++CONFIG_AK09911=m ++CONFIG_BMC150_MAGN_I2C=m ++CONFIG_BMC150_MAGN_SPI=m ++CONFIG_MAG3110=m ++CONFIG_HID_SENSOR_MAGNETOMETER_3D=m ++CONFIG_MMC35240=m ++CONFIG_IIO_ST_MAGN_3AXIS=m ++CONFIG_SENSORS_HMC5843_I2C=m ++CONFIG_SENSORS_HMC5843_SPI=m ++CONFIG_SENSORS_RM3100_I2C=m ++CONFIG_SENSORS_RM3100_SPI=m ++CONFIG_IIO_MUX=y ++CONFIG_HID_SENSOR_INCLINOMETER_3D=m ++CONFIG_HID_SENSOR_DEVICE_ROTATION=m ++CONFIG_IIO_HRTIMER_TRIGGER=m ++CONFIG_IIO_INTERRUPT_TRIGGER=m ++CONFIG_IIO_TIGHTLOOP_TRIGGER=m ++CONFIG_IIO_SYSFS_TRIGGER=m ++CONFIG_AD5272=m ++CONFIG_DS1803=m ++CONFIG_MAX5481=m ++CONFIG_MAX5487=m ++CONFIG_MCP4018=m ++CONFIG_MCP4131=m ++CONFIG_MCP4531=m ++CONFIG_MCP41010=m ++CONFIG_TPL0102=m ++CONFIG_LMP91000=m ++CONFIG_ABP060MG=m ++CONFIG_BMP280=m ++CONFIG_IIO_CROS_EC_BARO=m ++CONFIG_HID_SENSOR_PRESS=m ++CONFIG_HP03=m ++CONFIG_MPL115_I2C=m ++CONFIG_MPL115_SPI=m ++CONFIG_MPL3115=m ++CONFIG_MS5611=m ++CONFIG_MS5611_I2C=m ++CONFIG_MS5611_SPI=m ++CONFIG_MS5637=m ++CONFIG_IIO_ST_PRESS=m ++CONFIG_T5403=m ++CONFIG_HP206C=m ++CONFIG_ZPA2326=m ++CONFIG_AS3935=m ++CONFIG_ISL29501=m ++CONFIG_LIDAR_LITE_V2=m ++CONFIG_MB1232=m ++CONFIG_RFD77402=m ++CONFIG_SRF04=m ++CONFIG_SX9500=m ++CONFIG_SRF08=m ++CONFIG_VL53L0X_I2C=m ++CONFIG_AD2S90=m ++CONFIG_AD2S1200=m ++CONFIG_MAXIM_THERMOCOUPLE=m ++CONFIG_HID_SENSOR_TEMP=m ++CONFIG_MLX90614=m ++CONFIG_MLX90632=m ++CONFIG_TMP006=m ++CONFIG_TMP007=m ++CONFIG_TSYS01=m ++CONFIG_TSYS02D=m ++CONFIG_MAX31856=m ++CONFIG_PWM_CROS_EC=m ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_PHY_XGENE=y ++CONFIG_PHY_QCOM_USB_HS=y ++CONFIG_PHY_QCOM_USB_HSIC=y ++CONFIG_PHY_ROCKCHIP_DP=y ++CONFIG_PHY_ROCKCHIP_EMMC=y ++CONFIG_PHY_ROCKCHIP_INNO_HDMI=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_PCIE=y ++CONFIG_PHY_ROCKCHIP_TYPEC=y ++CONFIG_POWERCAP=y ++CONFIG_ARM_CCI_PMU=y ++CONFIG_ARM_CCN=y ++CONFIG_HISI_PMU=y ++CONFIG_LIBNVDIMM=y ++CONFIG_BLK_DEV_PMEM=m ++CONFIG_ND_BLK=m ++CONFIG_ROCKCHIP_EFUSE=y ++CONFIG_MUX_GPIO=y ++CONFIG_VALIDATE_FS_PARSER=y ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_PROC_INFO=y ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_XFS_FS=y ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_GFS2_FS=m ++CONFIG_GFS2_FS_LOCKING_DLM=y ++CONFIG_OCFS2_FS=m ++# CONFIG_OCFS2_FS_STATS is not set ++# CONFIG_OCFS2_DEBUG_MASKLOG is not set ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_NILFS2_FS=m ++CONFIG_F2FS_FS=y ++CONFIG_F2FS_FS_SECURITY=y ++CONFIG_FS_ENCRYPTION=y ++CONFIG_FANOTIFY=y ++CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y ++CONFIG_QUOTA_NETLINK_INTERFACE=y ++# CONFIG_PRINT_QUOTA_WARNING is not set ++CONFIG_QFMT_V2=y ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=y ++CONFIG_CUSE=y ++CONFIG_OVERLAY_FS=m ++CONFIG_FSCACHE=m ++CONFIG_FSCACHE_STATS=y ++CONFIG_FSCACHE_OBJECT_LIST=y ++CONFIG_CACHEFILES=m ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_NTFS_FS=y ++CONFIG_NTFS_RW=y ++CONFIG_PROC_KCORE=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_HUGETLBFS=y ++CONFIG_EFIVAR_FS=y ++CONFIG_AFFS_FS=m ++CONFIG_ECRYPT_FS=m ++CONFIG_HFS_FS=m ++CONFIG_HFSPLUS_FS=m ++CONFIG_BEFS_FS=m ++CONFIG_UBIFS_FS=m ++CONFIG_CRAMFS=m ++CONFIG_SQUASHFS=m ++CONFIG_SQUASHFS_XATTR=y ++CONFIG_SQUASHFS_LZ4=y ++CONFIG_SQUASHFS_LZO=y ++CONFIG_SQUASHFS_XZ=y ++CONFIG_MINIX_FS=m ++CONFIG_ROMFS_FS=m ++CONFIG_PSTORE=y ++CONFIG_PSTORE_RAM=m ++CONFIG_SYSV_FS=m ++CONFIG_UFS_FS=m ++CONFIG_NFS_FS=y ++# CONFIG_NFS_V2 is not set ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_NFS_SWAP=y ++CONFIG_NFS_V4_1=y ++CONFIG_NFS_V4_2=y ++CONFIG_NFSD=m ++CONFIG_NFSD_V3_ACL=y ++CONFIG_NFSD_V4=y ++CONFIG_NFSD_BLOCKLAYOUT=y ++CONFIG_NFSD_SCSILAYOUT=y ++CONFIG_NFSD_FLEXFILELAYOUT=y ++CONFIG_NFSD_V4_SECURITY_LABEL=y ++CONFIG_SUNRPC_DEBUG=y ++CONFIG_CEPH_FS=m ++CONFIG_CEPH_FSCACHE=y ++CONFIG_CEPH_FS_POSIX_ACL=y ++CONFIG_CIFS=m ++CONFIG_CIFS_WEAK_PW_HASH=y ++CONFIG_CIFS_UPCALL=y ++CONFIG_CIFS_XATTR=y ++CONFIG_CIFS_POSIX=y ++CONFIG_CIFS_DFS_UPCALL=y ++CONFIG_CIFS_FSCACHE=y ++CONFIG_CODA_FS=m ++CONFIG_9P_FS=m ++CONFIG_9P_FSCACHE=y ++CONFIG_9P_FS_POSIX_ACL=y ++CONFIG_9P_FS_SECURITY=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=m ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++CONFIG_NLS_MAC_ROMAN=m ++CONFIG_NLS_MAC_CELTIC=m ++CONFIG_NLS_MAC_CENTEURO=m ++CONFIG_NLS_MAC_CROATIAN=m ++CONFIG_NLS_MAC_CYRILLIC=m ++CONFIG_NLS_MAC_GAELIC=m ++CONFIG_NLS_MAC_GREEK=m ++CONFIG_NLS_MAC_ICELAND=m ++CONFIG_NLS_MAC_INUIT=m ++CONFIG_NLS_MAC_ROMANIAN=m ++CONFIG_NLS_MAC_TURKISH=m ++CONFIG_DLM=m ++CONFIG_DLM_DEBUG=y ++CONFIG_PERSISTENT_KEYRINGS=y ++CONFIG_BIG_KEYS=y ++CONFIG_TRUSTED_KEYS=m ++CONFIG_ENCRYPTED_KEYS=y ++CONFIG_SECURITY=y ++CONFIG_SECURITY_NETWORK=y ++CONFIG_SECURITY_NETWORK_XFRM=y ++CONFIG_SECURITY_YAMA=y ++# CONFIG_INTEGRITY is not set ++CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" ++CONFIG_CRYPTO_USER=m ++# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set ++CONFIG_CRYPTO_PCRYPT=m ++CONFIG_CRYPTO_DH=m ++CONFIG_CRYPTO_CHACHA20POLY1305=m ++CONFIG_CRYPTO_AEGIS128=m ++CONFIG_CRYPTO_CFB=m ++CONFIG_CRYPTO_LRW=m ++CONFIG_CRYPTO_OFB=m ++CONFIG_CRYPTO_PCBC=m ++CONFIG_CRYPTO_KEYWRAP=m ++CONFIG_CRYPTO_ADIANTUM=m ++CONFIG_CRYPTO_XCBC=m ++CONFIG_CRYPTO_VMAC=m ++CONFIG_CRYPTO_RMD128=m ++CONFIG_CRYPTO_RMD160=m ++CONFIG_CRYPTO_RMD256=m ++CONFIG_CRYPTO_RMD320=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_ANUBIS=m ++CONFIG_CRYPTO_BLOWFISH=m ++CONFIG_CRYPTO_CAMELLIA=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_CAST6=m ++CONFIG_CRYPTO_FCRYPT=m ++CONFIG_CRYPTO_KHAZAD=m ++CONFIG_CRYPTO_SALSA20=m ++CONFIG_CRYPTO_SEED=m ++CONFIG_CRYPTO_SERPENT=m ++CONFIG_CRYPTO_TEA=m ++CONFIG_CRYPTO_TWOFISH=m ++CONFIG_CRYPTO_842=m ++CONFIG_CRYPTO_LZ4=m ++CONFIG_CRYPTO_LZ4HC=m ++CONFIG_CRYPTO_ANSI_CPRNG=m ++CONFIG_CRYPTO_DRBG_HASH=y ++CONFIG_CRYPTO_DRBG_CTR=y ++CONFIG_CRYPTO_USER_API_HASH=y ++CONFIG_CRYPTO_USER_API_SKCIPHER=y ++CONFIG_CRYPTO_USER_API_RNG=y ++CONFIG_CRYPTO_USER_API_AEAD=y ++CONFIG_CRYPTO_DEV_CCP=y ++CONFIG_CRYPTO_DEV_ROCKCHIP=m ++CONFIG_CRYPTO_DEV_SAFEXCEL=m ++CONFIG_CRYPTO_DEV_CCREE=m ++# CONFIG_XZ_DEC_X86 is not set ++# CONFIG_XZ_DEC_POWERPC is not set ++# CONFIG_XZ_DEC_IA64 is not set ++# CONFIG_XZ_DEC_SPARC is not set ++CONFIG_DMA_CMA=y ++CONFIG_CMA_SIZE_MBYTES=64 ++CONFIG_PRINTK_TIME=y ++CONFIG_BOOT_PRINTK_DELAY=y ++CONFIG_DYNAMIC_DEBUG=y ++CONFIG_FRAME_WARN=1024 ++CONFIG_STRIP_ASM_SYMS=y ++CONFIG_DEBUG_SECTION_MISMATCH=y ++CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x0 ++CONFIG_DEBUG_VM=y ++CONFIG_SOFTLOCKUP_DETECTOR=y ++CONFIG_SCHEDSTATS=y ++CONFIG_DEBUG_LIST=y ++CONFIG_RCU_TORTURE_TEST=m ++CONFIG_RCU_CPU_STALL_TIMEOUT=60 ++# CONFIG_RCU_TRACE is not set ++# CONFIG_FUNCTION_GRAPH_TRACER is not set ++CONFIG_SCHED_TRACER=y ++CONFIG_FTRACE_SYSCALLS=y ++CONFIG_STACK_TRACER=y ++CONFIG_BLK_DEV_IO_TRACE=y ++# CONFIG_UPROBE_EVENTS is not set ++CONFIG_FUNCTION_PROFILER=y ++CONFIG_RING_BUFFER_BENCHMARK=m ++# CONFIG_RUNTIME_TESTING_MENU is not set ++CONFIG_KGDB=y ++CONFIG_KGDB_TESTS=y +-- +2.25.4 + + +From dfc6976747700e4211ab64b38152bc3edbcc0aa3 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 8 Nov 2019 13:39:02 +0100 +Subject: [PATCH 05/98] panel-simple: Slow down display clock a little + +This might help with marginal designs a bit and does still archieve 60 Hz +refresh rate +--- + drivers/gpu/drm/panel/panel-simple.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c +index cce539b99c35..11c96029bdf2 100644 +--- a/drivers/gpu/drm/panel/panel-simple.c ++++ b/drivers/gpu/drm/panel/panel-simple.c +@@ -1035,15 +1035,15 @@ static const struct panel_desc boe_nv101wxmn51 = { + + static const struct drm_display_mode boe_nv140fhmn49_modes[] = { + { +- .clock = 150000, ++ .clock = 148500, + .hdisplay = 1920, + .hsync_start = 1920 + 48, + .hsync_end = 1920 + 48 + 32, +- .htotal = 1920 + 48 + 32 + 80, ++ .htotal = 2200, + .vdisplay = 1080, + .vsync_start = 1080 + 3, + .vsync_end = 1080 + 3 + 5, +- .vtotal = 1080 + 3 + 5 + 24, ++ .vtotal = 1125, + .vrefresh = 60, + }, + }; +-- +2.25.4 + + +From 2d1f339682ed266686d482bf9fc67c06189bfec2 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 8 Nov 2019 16:41:56 +0100 +Subject: [PATCH 06/98] arm64: Enable charging via USB-C on the Pinebook Pro + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 569c1490b024..8140c33ae812 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -7,6 +7,7 @@ + /dts-v1/; + #include + #include ++#include + #include "rk3399.dtsi" + #include "rk3399-opp.dtsi" + +@@ -311,7 +312,6 @@ + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vcc5v0_typec"; +- regulator-always-on; + vin-supply = <&vcc_sys>; + }; + +@@ -719,10 +719,18 @@ + reg = <0x22>; + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; +- vbus-5v-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; +- int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; + fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ vbus-supply = <&vcc5v0_typec>; + status = "okay"; ++ connector { ++ compatible = "usb-c-connector"; ++ label = "USB-C"; ++ power-role = "dual"; ++ try-power-role = "sink"; ++ source-pdos = ; ++ sink-pdos = ; ++ op-sink-microwatt = <1000000>; ++ }; + }; + + cw2015@62 { +-- +2.25.4 + + +From 7a337563c795f285fdcb6ea50e494d0c38c48e74 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 8 Nov 2019 16:47:57 +0100 +Subject: [PATCH 07/98] arm64: Workaround to shorten boot time on the Pinebook + Pro + +Initialization of crypto_rsa and the tracing subsystem take forever (>300 s) +during early boot. In the case of crypto_rsa it seems to come down to +some misscalculation of crypto test runtime based on dmips specified +in the dt. Loading the module later is way faster (0.5 s). The only +drawback of this is that signing of the mac80211 regdb must also be +disabled. +I do currently not have any idea why initialization of the tracing framework +is taking such a long time (30 s). +However, this workaround is very much non-invasive since it concernes only +the kernel config. +This patch shortens the boot time from more than 3 minutes down to +just 30 seconds even from an micro SD card. +--- + arch/arm64/configs/pinebook_pro_defconfig | 25 +++++++++++++---------- + 1 file changed, 14 insertions(+), 11 deletions(-) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index e9178a35ebe0..f939d2b68f12 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -608,6 +608,8 @@ CONFIG_BT_MRVL=m + CONFIG_BT_MRVL_SDIO=m + CONFIG_BT_ATH3K=m + CONFIG_CFG80211=m ++CONFIG_CFG80211_CERTIFICATION_ONUS=y ++# CONFIG_CFG80211_REQUIRE_SIGNED_REGDB is not set + CONFIG_CFG80211_DEBUGFS=y + CONFIG_MAC80211=m + CONFIG_MAC80211_MESH=y +@@ -661,7 +663,6 @@ CONFIG_MTD_PHYSMAP_OF=y + CONFIG_MTD_RAW_NAND=y + CONFIG_MTD_SPI_NOR=y + CONFIG_MTD_UBI=m +-CONFIG_OF_CONFIGFS=y + CONFIG_BLK_DEV_NULL_BLK=m + CONFIG_ZRAM=m + CONFIG_BLK_DEV_UMEM=m +@@ -1089,7 +1090,6 @@ CONFIG_IWLDVM=m + CONFIG_IWLMVM=m + CONFIG_IWLWIFI_DEBUG=y + CONFIG_IWLWIFI_DEBUGFS=y +-# CONFIG_IWLWIFI_DEVICE_TRACING is not set + CONFIG_HOSTAP=m + CONFIG_HOSTAP_FIRMWARE=y + CONFIG_HOSTAP_PLX=m +@@ -1846,6 +1846,9 @@ CONFIG_SND_MIXER_OSS=m + CONFIG_SND_PCM_OSS=m + CONFIG_SND_HRTIMER=m + # CONFIG_SND_SUPPORT_OLD_API is not set ++CONFIG_SND_VERBOSE_PRINTK=y ++CONFIG_SND_DEBUG=y ++CONFIG_SND_DEBUG_VERBOSE=y + CONFIG_SND_SEQUENCER=m + CONFIG_SND_SEQ_DUMMY=m + CONFIG_SND_SEQUENCER_OSS=m +@@ -1946,10 +1949,12 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m + CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m + CONFIG_SND_SOC_RK3399_GRU_SOUND=m + CONFIG_SND_SOC_CROS_EC_CODEC=m ++CONFIG_SND_SOC_ES8316=m + CONFIG_SND_SOC_MSM8916_WCD_ANALOG=y + CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=y + CONFIG_SND_SOC_PCM3168A_I2C=m + CONFIG_SND_SOC_RK3328=m ++CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m + CONFIG_SND_SIMPLE_CARD=m + CONFIG_SND_AUDIO_GRAPH_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y +@@ -2419,7 +2424,6 @@ CONFIG_FB_TFT_UC1611=m + CONFIG_FB_TFT_UC1701=m + CONFIG_FB_TFT_UPD161704=m + CONFIG_FB_TFT_WATTEROTT=m +-CONFIG_FB_FLEX=m + CONFIG_USB_WUSB_CBAF=m + CONFIG_USB_HWA_HCD=m + CONFIG_UWB=m +@@ -2965,6 +2969,11 @@ CONFIG_CRYPTO_DEV_CCP=y + CONFIG_CRYPTO_DEV_ROCKCHIP=m + CONFIG_CRYPTO_DEV_SAFEXCEL=m + CONFIG_CRYPTO_DEV_CCREE=m ++CONFIG_ASYMMETRIC_KEY_TYPE=y ++CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y ++CONFIG_X509_CERTIFICATE_PARSER=y ++CONFIG_PKCS7_MESSAGE_PARSER=y ++CONFIG_SYSTEM_TRUSTED_KEYRING=y + # CONFIG_XZ_DEC_X86 is not set + # CONFIG_XZ_DEC_POWERPC is not set + # CONFIG_XZ_DEC_IA64 is not set +@@ -2981,18 +2990,12 @@ CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x0 + CONFIG_DEBUG_VM=y + CONFIG_SOFTLOCKUP_DETECTOR=y + CONFIG_SCHEDSTATS=y ++CONFIG_STACKTRACE=y + CONFIG_DEBUG_LIST=y + CONFIG_RCU_TORTURE_TEST=m + CONFIG_RCU_CPU_STALL_TIMEOUT=60 + # CONFIG_RCU_TRACE is not set +-# CONFIG_FUNCTION_GRAPH_TRACER is not set +-CONFIG_SCHED_TRACER=y +-CONFIG_FTRACE_SYSCALLS=y +-CONFIG_STACK_TRACER=y +-CONFIG_BLK_DEV_IO_TRACE=y +-# CONFIG_UPROBE_EVENTS is not set +-CONFIG_FUNCTION_PROFILER=y +-CONFIG_RING_BUFFER_BENCHMARK=m ++# CONFIG_FTRACE is not set + # CONFIG_RUNTIME_TESTING_MENU is not set + CONFIG_KGDB=y + CONFIG_KGDB_TESTS=y +-- +2.25.4 + + +From 24a57885a16014393527c614f3c59b642e8fbaf8 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 8 Nov 2019 22:47:14 +0100 +Subject: [PATCH 08/98] arm64: Ignore eDP hpd on the Pinebook Pro + +Hotplug detect of the eDP panel is not connected. Thus it needs to be ignored +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 8140c33ae812..2b4fcebaa692 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -380,6 +380,7 @@ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&edp_hpd>; ++ force-hpd; + + ports { + edp_out: port@1 { +-- +2.25.4 + + +From 3d35fe63b732690d06d9041d951e1700d0c9bb44 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 9 Nov 2019 12:59:44 +0100 +Subject: [PATCH 09/98] arm64: Add 2 GHz operating power point to big cpu + cluster on the Pinebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 2b4fcebaa692..9b577b25f07f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -803,6 +803,13 @@ + status = "okay"; + }; + ++&cluster1_opp { ++ opp08 { ++ opp-hz = /bits/ 64 <2000000000>; ++ opp-microvolt = <1300000>; ++ }; ++}; ++ + &pinctrl { + buttons { + pwrbtn: pwrbtn { +-- +2.25.4 + + +From 19aa6e6f37efb5402f3bcb2721cd98c7550f1d75 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 7 Nov 2019 20:46:08 +0100 +Subject: [PATCH 10/98] arm64: Add audio support for the Pinebook Pro + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 64 +++++++++---------- + 1 file changed, 29 insertions(+), 35 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 9b577b25f07f..08a6de6b3e26 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -202,21 +202,27 @@ + BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +-/* ++ + es8316-sound { + status = "okay"; + compatible = "simple-audio-card"; + simple-audio-card,name = "rockchip,es8316-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; ++ + simple-audio-card,widgets = + "Microphone", "Mic Jack", +- "Headphone", "Headphone Jack"; ++ "Headphone", "Headphones", ++ "Speaker", "Speaker"; + simple-audio-card,routing = +- "Mic Jack", "MICBIAS1", +- "IN1P", "Mic Jack", +- "Headphone Jack", "HPOL", +- "Headphone Jack", "HPOR"; ++ "MIC1", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "Speaker", "HPOL", ++ "Speaker", "HPOR"; ++ ++ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; ++ simple-audio-card,aux-devs = <&speaker_amp>; + + simple-audio-card,cpu { + sound-dai = <&i2s1>; +@@ -226,22 +232,12 @@ + sound-dai = <&es8316>; + }; + }; +-*/ +- speaker-sound { +- status = "okay"; +- compatible = "simple-audio-card"; +- simple-audio-card,format = "i2s"; +- simple-audio-card,name = "rk-es8316-spk-sound"; +- simple-audio-card,mclk-fs = <256>; + +- simple-audio-card,cpu { +- sound-dai = <&i2s1>; +- system-clock-frequency = <12288000>; +- }; +- simple-audio-card,codec { +- sound-dai = <&es8316>; +- system-clock-frequency = <12288000>; +- }; ++ speaker_amp: speaker-amplifier { ++ status = "okay"; ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ VCC-supply = <&vcc5v0_host>; + }; + + fan0: pwm-fan { +@@ -685,20 +681,18 @@ + }; + + &i2c1 { +- i2c-scl-rising-time-ns = <300>; +- i2c-scl-falling-time-ns = <15>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; + status = "okay"; + ++ clock-frequency = <100000>; ++ + es8316: es8316@11 { + #sound-dai-cells = <0>; + compatible = "everest,es8316"; + reg = <0x11>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; +- pinctrl-names = "default"; +- pinctrl-0 = <&i2s_8ch_mclk>; +- spk-con-gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; +- hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; + }; + }; + +@@ -756,22 +750,22 @@ + }; + + &i2s0 { +- rockchip,playback-channels = <8>; +- rockchip,capture-channels = <8>; +- #sound-dai-cells = <0>; +- status = "okay"; ++ status = "disabled"; + }; + + &i2s1 { +- rockchip,playback-channels = <2>; +- rockchip,capture-channels = <2>; ++ rockchip,i2s-broken-burst-len; ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; + #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_8ch_mclk>, <&i2s1_2ch_bus>; + status = "okay"; + }; + + &i2s2 { + #sound-dai-cells = <0>; +- status = "okay"; ++ status = "disabled"; + }; + + &io_domains { +@@ -889,7 +883,7 @@ + }; + }; + +- i2s0 { ++ i2s1 { + i2s_8ch_mclk: i2s-8ch-mclk { + rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>; + }; +-- +2.25.4 + + +From 54f54efb9ec3b01c94ecbffc4d9da9e00e4b2b6d Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 9 Nov 2019 21:01:38 +0100 +Subject: [PATCH 11/98] rk808: Poweroff on syscore powerdown if pm_power_off + not available + +Due to the inherent limitation of supporting only a single pm_power_off +function the rk808 will now power off on syscore_powerdown if platform +power control was requested +--- + drivers/mfd/rk808.c | 40 +++++++++++++++++++++++++++------------ + include/linux/mfd/rk808.h | 1 + + 2 files changed, 29 insertions(+), 12 deletions(-) + +diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c +index 050478cabc95..0212f256c16f 100644 +--- a/drivers/mfd/rk808.c ++++ b/drivers/mfd/rk808.c +@@ -526,15 +526,26 @@ static void rk8xx_syscore_shutdown(void) + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); + int ret; + +- if (system_state == SYSTEM_POWER_OFF && +- (rk808->variant == RK809_ID || rk808->variant == RK817_ID)) { +- ret = regmap_update_bits(rk808->regmap, +- RK817_SYS_CFG(3), +- RK817_SLPPIN_FUNC_MSK, +- SLPPIN_DN_FUN); +- if (ret) { +- dev_warn(&rk808_i2c_client->dev, +- "Cannot switch to power down function\n"); ++ if (system_state == SYSTEM_POWER_OFF) { ++ switch(rk808->variant) { ++ case RK809_ID: ++ case RK817_ID: ++ ret = regmap_update_bits(rk808->regmap, ++ RK817_SYS_CFG(3), ++ RK817_SLPPIN_FUNC_MSK, ++ SLPPIN_DN_FUN); ++ if (ret) { ++ dev_warn(&rk808_i2c_client->dev, ++ "Cannot switch to power down function\n"); ++ } ++ break; ++ case RK808_ID: ++ if(rk808->use_syscore_powerdown) { ++ rk808_device_shutdown(); ++ } ++ break; ++ default: ++ break; + } + } + } +@@ -617,6 +628,7 @@ static int rk808_probe(struct i2c_client *client, + cells = rk808s; + nr_cells = ARRAY_SIZE(rk808s); + rk808->pm_pwroff_fn = rk808_device_shutdown; ++ register_syscore_ops(&rk808_syscore_ops); + break; + case RK818_ID: + rk808->regmap_cfg = &rk818_regmap_config; +@@ -688,9 +700,13 @@ static int rk808_probe(struct i2c_client *client, + + pm_off = of_property_read_bool(np, + "rockchip,system-power-controller"); +- if (pm_off && !pm_power_off) { +- rk808_i2c_client = client; +- pm_power_off = rk808->pm_pwroff_fn; ++ if (pm_off) { ++ if (pm_power_off) { ++ rk808->use_syscore_powerdown = true; ++ } else { ++ rk808_i2c_client = client; ++ pm_power_off = rk808->pm_pwroff_fn; ++ } + } + + if (pm_off && !pm_power_off_prepare) { +diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h +index 7cfd2b0504df..0ad84aefb1d0 100644 +--- a/include/linux/mfd/rk808.h ++++ b/include/linux/mfd/rk808.h +@@ -622,5 +622,6 @@ struct rk808 { + const struct regmap_irq_chip *regmap_irq_chip; + void (*pm_pwroff_fn)(void); + void (*pm_pwroff_prep_fn)(void); ++ bool use_syscore_powerdown; + }; + #endif /* __LINUX_REGULATOR_RK808_H */ +-- +2.25.4 + + +From b286d0102f4a5e772ae3461726eaa1a33ecd67cd Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 9 Nov 2019 21:05:09 +0100 +Subject: [PATCH 12/98] arm64: Use symbolic name for cd pin on mcc controller + on the Pinebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 08a6de6b3e26..af6c8da7c057 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -918,7 +918,7 @@ + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; +- cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; ++ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + sd-uhs-sdr104; + max-frequency = <150000000>; +-- +2.25.4 + + +From f233c1a32dcdcea00660c1e10688c94a8c117f97 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 9 Nov 2019 21:19:03 +0100 +Subject: [PATCH 13/98] arm64: Add gpio controlled leds to Pinebook Pro + devicetree + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 50 +++++++++++-------- + 1 file changed, 29 insertions(+), 21 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index af6c8da7c057..f8d6fb740d35 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -8,6 +8,7 @@ + #include + #include + #include ++//#include + #include "rk3399.dtsi" + #include "rk3399-opp.dtsi" + +@@ -42,6 +43,32 @@ + stdout-path = "serial2:1500000n8"; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrled &slpled>; ++ ++ /* Hack using active_low as inversion. A real, inverted trigger would be nicer */ ++ green-led { ++ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>; ++ label = "green:disk-activity"; ++// function = LED_FUNCTION_POWER; ++ linux,default-trigger = "disk-activity"; ++ default-state = "off"; ++// color = ; ++ }; ++ ++ red-led { ++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ label = "red:standby"; ++// function = LED_FUNCTION_STANDBY; ++ default-state = "off"; ++ panic-indicator; ++ retain-state-suspended; ++// color = ; ++ }; ++ }; ++ + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; +@@ -145,25 +172,6 @@ + }; + }; + +- leds { +- +- compatible = "gpio-leds"; +- pinctrl-names = "default"; +- pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; +- +- work-led { +- label = "work"; +- default-state = "on"; +- gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; +- }; +- +- diy-led { +- label = "diy"; +- default-state = "off"; +- gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; +- }; +- }; +- + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; +@@ -824,11 +832,11 @@ + }; + + leds { +- work_led_gpio: work_led-gpio { ++ pwrled: pwrled { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- diy_led_gpio: diy_led-gpio { ++ slpled: slpled { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +-- +2.25.4 + + +From cbe623c5b79cbe11dd7b68fe89325d8b793322f0 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 9 Nov 2019 21:20:25 +0100 +Subject: [PATCH 14/98] arm64: Support lid button on the Pinebook Pro + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 18 ++++++++++++++---- + 1 file changed, 14 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index f8d6fb740d35..15816f4a5413 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -93,17 +93,24 @@ + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; +- pinctrl-0 = <&pwrbtn>; ++ pinctrl-0 = <&pwrbtn &lidbtn>; + + power { +- debounce-interval = <100>; ++ debounce-interval = <20>; + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; +- label = "GPIO Key Power"; ++ label = "Power"; + linux,code = ; + wakeup-source; + }; +- }; + ++ lid { ++ debounce-interval = <20>; ++ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; ++ label = "Lid"; ++ linux,code = ; ++ linux,input-type = ; ++ }; ++ }; + + backlight: edp-backlight { + compatible = "pwm-backlight"; +@@ -817,6 +824,9 @@ + pwrbtn: pwrbtn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; ++ lidbtn: lidbtn { ++ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; + }; + + dc-charger { +-- +2.25.4 + + +From 7c32c7888d15cd33d5a8ccddd5c3c3cbc9f421a8 Mon Sep 17 00:00:00 2001 +From: Daniel Thompson +Date: Mon, 11 Nov 2019 18:52:06 +0000 +Subject: [PATCH 15/98] arm64: dts: rockchip: Use lid as a wake up source for + Pinebook Pro + +Generally speaking closing the lid triggers a suspend and opening it +should cause a wakeup. + +Tested using suspend-to-idle (and probably not sufficient to wake up +from a deep suspend). + +Signed-off-by: Daniel Thompson +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 15816f4a5413..1ddca1cbcd4a 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -109,6 +109,7 @@ + label = "Lid"; + linux,code = ; + linux,input-type = ; ++ wakeup-source; + }; + }; + +-- +2.25.4 + + +From ebc024f9e466f895e2869c66134ae69cddfa6940 Mon Sep 17 00:00:00 2001 +From: Daniel Thompson +Date: Mon, 11 Nov 2019 18:52:07 +0000 +Subject: [PATCH 16/98] arm64: dts: rockchip: Fix mispelled compatible string + +The correct vendor prefix for Fairchild Semiconductor is fcs. + +Signed-off-by: Daniel Thompson +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 1ddca1cbcd4a..6b57057fa028 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -726,7 +726,7 @@ + status = "okay"; + + fusb0: fusb30x@22 { +- compatible = "fairchild,fusb302"; ++ compatible = "fcs,fusb302"; + reg = <0x22>; + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; +-- +2.25.4 + + +From f181ef680f8dad4a9fe3a85b9f830dd68081b7a7 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 12 Nov 2019 19:37:11 +0100 +Subject: [PATCH 17/98] arm64: Route speaker audio through audio amplifier on + Ponebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 6b57057fa028..3a27da05197f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -234,8 +234,10 @@ + "MIC1", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR", +- "Speaker", "HPOL", +- "Speaker", "HPOR"; ++ "Speaker Amplifier INL", "HPOL", ++ "Speaker Amplifier INR", "HPOR", ++ "Speaker", "Speaker Amplifier OUTL", ++ "Speaker", "Speaker Amplifier OUTR"; + + simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; + simple-audio-card,aux-devs = <&speaker_amp>; +@@ -254,6 +256,7 @@ + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; + VCC-supply = <&vcc5v0_host>; ++ sound-name-prefix = "Speaker Amplifier"; + }; + + fan0: pwm-fan { +-- +2.25.4 + + +From 0ba15c0a3f2abc3c0622e7e59d7e38f9090250bd Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 16:08:48 +0100 +Subject: [PATCH 18/98] cw2015: Touch up devicetree as mainline preparation + +--- + drivers/power/supply/cw2015_battery.c | 74 ++++++++------------------- + include/linux/power/cw2015_battery.h | 4 +- + 2 files changed, 24 insertions(+), 54 deletions(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 4da65c606338..2e1a3db8eab4 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -36,6 +36,9 @@ module_param_named(dbg_level, dbg_enable, int, 0644); + } \ + } while (0) + ++ ++#define PREFIX "cellwise," ++ + static int cw_read(struct i2c_client *client, u8 reg, u8 buf[]) + { + return i2c_smbus_read_i2c_block_data(client, reg, 1, buf); +@@ -85,7 +88,7 @@ int cw_update_config_info(struct cw_battery *cw_bat) + + reg_val |= CW2015_CONFIG_UPDATE_FLG; /* set UPDATE_FLAG */ + reg_val &= ~CW2015_MASK_ATHD; /* clear ATHD */ +- reg_val |= CW2015_ATHD; /* set CW2015_ATHD */ ++ reg_val |= CW2015_ATHD(cw_bat->alert_level); /* set CW2015_ATHD */ + ret = cw_write(cw_bat->client, CW2015_REG_CONFIG, ®_val); + if (ret < 0) + return ret; +@@ -100,7 +103,7 @@ int cw_update_config_info(struct cw_battery *cw_bat) + "update flag for new battery info have not set..\n"); + } + +- if ((reg_val & CW2015_MASK_ATHD) != CW2015_ATHD) ++ if ((reg_val & CW2015_MASK_ATHD) != CW2015_ATHD(cw_bat->alert_level)) + dev_info(&cw_bat->client->dev, "the new CW2015_ATHD have not set..\n"); + + /* reset */ +@@ -137,10 +140,10 @@ static int cw_init(struct cw_battery *cw_bat) + if (ret < 0) + return ret; + +- if ((reg_val & CW2015_MASK_ATHD) != CW2015_ATHD) { ++ if ((reg_val & CW2015_MASK_ATHD) != CW2015_ATHD(cw_bat->alert_level)) { + dev_info(&cw_bat->client->dev, "the new CW2015_ATHD have not set\n"); + reg_val &= ~CW2015_MASK_ATHD; /* clear CW2015_ATHD */ +- reg_val |= CW2015_ATHD; /* set CW2015_ATHD */ ++ reg_val |= ~CW2015_ATHD(cw_bat->alert_level); /* set CW2015_ATHD */ + ret = cw_write(cw_bat->client, CW2015_REG_CONFIG, ®_val); + if (ret < 0) + return ret; +@@ -449,8 +452,6 @@ static int cw_get_voltage(struct cw_battery *cw_bat) + res1 = cw_bat->plat_data.divider_res1; + res2 = cw_bat->plat_data.divider_res2; + voltage = voltage * (res1 + res2) / res2; +- } else if (cw_bat->dual_battery) { +- voltage = voltage * 2; + } + + dev_dbg(&cw_bat->client->dev, "the cw201x voltage=%d,reg_val=%x %x\n", +@@ -714,51 +715,14 @@ static int cw2015_parse_dt(struct cw_battery *cw_bat) + u32 value; + int ret; + struct cw_bat_platform_data *data = &cw_bat->plat_data; +- struct gpio_desc *hw_id0_io; +- struct gpio_desc *hw_id1_io; +- int hw_id0_val; +- int hw_id1_val; + + if (!node) + return -ENODEV; + + memset(data, 0, sizeof(*data)); + +- ret = of_property_read_u32(node, "hw_id_check", &value); +- if (!ret && value) { +- hw_id0_io = gpiod_get_optional(dev, "hw-id0", GPIOD_IN); +- if (!hw_id0_io) +- return -EINVAL; +- if (IS_ERR(hw_id0_io)) +- return PTR_ERR(hw_id0_io); +- +- hw_id0_val = gpiod_get_value(hw_id0_io); +- gpiod_put(hw_id0_io); +- +- hw_id1_io = gpiod_get_optional(dev, "hw-id1", GPIOD_IN); +- if (!hw_id1_io) +- return -EINVAL; +- if (IS_ERR(hw_id1_io)) +- return PTR_ERR(hw_id1_io); +- +- hw_id1_val = gpiod_get_value(hw_id1_io); +- gpiod_put(hw_id1_io); +- +- /* +- * ID1 = 0, ID0 = 1 : Battery +- * ID1 = 1, ID0 = 0 : Dual Battery +- * ID1 = 0, ID0 = 0 : Adapter +- */ +- if (hw_id0_val == 1 && hw_id1_val == 0) +- cw_bat->dual_battery = false; +- else if (hw_id0_val == 0 && hw_id1_val == 1) +- cw_bat->dual_battery = true; +- else +- return -EINVAL; +- } +- + /* determine the number of config info */ +- prop = of_find_property(node, "bat_config_info", &length); ++ prop = of_find_property(node, PREFIX"bat-config-info", &length); + if (!prop) + return -EINVAL; + +@@ -771,7 +735,7 @@ static int cw2015_parse_dt(struct cw_battery *cw_bat) + if (!data->cw_bat_config_info) + return -ENOMEM; + +- ret = of_property_read_u32_array(node, "bat_config_info", ++ ret = of_property_read_u32_array(node, PREFIX"bat-config-info", + data->cw_bat_config_info, + length); + if (ret < 0) +@@ -781,35 +745,41 @@ static int cw2015_parse_dt(struct cw_battery *cw_bat) + cw_bat->bat_mode = MODE_BATTERY; + cw_bat->monitor_sec = CW2015_DEFAULT_MONITOR_SEC * CW2015_TIMER_MS_COUNTS; + +- ret = of_property_read_u32(node, "divider_res1", &value); ++ ret = of_property_read_u32(node, PREFIX"divider-res1", &value); + if (ret < 0) + value = 0; + data->divider_res1 = value; + +- ret = of_property_read_u32(node, "divider_res2", &value); ++ ret = of_property_read_u32(node, PREFIX"divider-res2", &value); + if (ret < 0) + value = 0; + data->divider_res2 = value; + +- ret = of_property_read_u32(node, "virtual_power", &value); ++ ret = of_property_read_u32(node, PREFIX"virtual-power", &value); + if (ret < 0) + value = 0; + cw_bat->bat_mode = value; + +- ret = of_property_read_u32(node, "monitor_sec", &value); ++ ret = of_property_read_u32(node, PREFIX"monitor-interval", &value); + if (ret < 0) +- dev_err(dev, "monitor_sec missing!\n"); ++ dev_err(dev, "monitor-interval missing!\n"); + else + cw_bat->monitor_sec = value * CW2015_TIMER_MS_COUNTS; + +- ret = of_property_read_u32(node, "design_capacity", &value); ++ ret = of_property_read_u32(node, PREFIX"design-capacity", &value); + if (ret < 0) { +- dev_err(dev, "design_capacity missing!\n"); ++ dev_err(dev, "design-capacity missing!\n"); + data->design_capacity = 2000; + } else { + data->design_capacity = value; + } + ++ of_property_read_u8(node, PREFIX"alert-level", &cw_bat->alert_level); ++ if (cw_bat->alert_level > 100) { ++ dev_err(dev, "invalid alert_level, clamping to 100 %%\n"); ++ cw_bat->alert_level = 100; ++ } ++ + return 0; + } + #else +diff --git a/include/linux/power/cw2015_battery.h b/include/linux/power/cw2015_battery.h +index 59ad35b0c7f2..c7abd8aa0c28 100644 +--- a/include/linux/power/cw2015_battery.h ++++ b/include/linux/power/cw2015_battery.h +@@ -40,7 +40,7 @@ + #define CW2015_MODE_RESTART (0xf<<0) + + #define CW2015_CONFIG_UPDATE_FLG (0x01<<1) +-#define CW2015_ATHD (0x00<<3) ++#define CW2015_ATHD(x) ((x)<<3) + #define CW2015_MASK_ATHD (0x1f<<3) + #define CW2015_MASK_SOC (0x1fff) + +@@ -115,8 +115,8 @@ struct cw_battery { + u32 monitor_sec; + u32 bat_mode; + int bat_change; +- bool dual_battery; + int charge_count; ++ u8 alert_level; + }; + + #endif +-- +2.25.4 + + +From ce47e76802a94c6bb2a821560613c5ad049d6f20 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 16:10:01 +0100 +Subject: [PATCH 19/98] cw2015: Make cw215_battery a proper module + +--- + drivers/power/supply/Kconfig | 7 +++---- + drivers/power/supply/cw2015_battery.c | 27 +++++++++++++++++++++++---- + 2 files changed, 26 insertions(+), 8 deletions(-) + +diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig +index e1f4504612a3..38cf80db1930 100644 +--- a/drivers/power/supply/Kconfig ++++ b/drivers/power/supply/Kconfig +@@ -117,11 +117,10 @@ config BATTERY_CPCAP + phones and tablets such as droid 4. + + config BATTERY_CW2015 +- bool "CW2015 Battery driver" +- default n ++ tristate "CW2015 Battery driver" + help +- If you say yes here you will get support for the battery of CW2015. +- This driver can give support for CW2015 Battery Interface. ++ Say Y here to enable support for the cellwise cw2015 ++ battery fuel gauge (used in the Pinebook Pro & others) + + config BATTERY_DS2760 + tristate "DS2760 battery driver (HP iPAQ & others)" +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 2e1a3db8eab4..035c990a1a28 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -22,6 +22,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -851,7 +852,7 @@ static int cw_bat_suspend(struct device *dev) + { + struct i2c_client *client = to_i2c_client(dev); + struct cw_battery *cw_bat = i2c_get_clientdata(client); +- read_persistent_clock64(&cw_bat->suspend_time_before); ++ ktime_get_boottime_ts64(&cw_bat->suspend_time_before); + cancel_delayed_work(&cw_bat->battery_delay_work); + return 0; + } +@@ -861,7 +862,7 @@ static int cw_bat_resume(struct device *dev) + struct i2c_client *client = to_i2c_client(dev); + struct cw_battery *cw_bat = i2c_get_clientdata(client); + cw_bat->suspend_resume_mark = 1; +- read_persistent_clock64(&cw_bat->after); ++ ktime_get_boottime_ts64(&cw_bat->after); + cw_bat->after = timespec64_sub(cw_bat->after, + cw_bat->suspend_time_before); + queue_delayed_work(cw_bat->battery_workqueue, +@@ -885,13 +886,31 @@ static int cw_bat_remove(struct i2c_client *client) + } + + static const struct i2c_device_id cw_bat_id_table[] = { +- {"cw201x", 0}, ++ { "cw201x", 0 }, ++ { "cw2013", 0 }, ++ { "cw2015", 0 }, + {} + }; + ++static const struct of_device_id cw2015_of_match[] = { ++ { .compatible = PREFIX"cw201x" }, ++ { .compatible = PREFIX"cw2013" }, ++ { .compatible = PREFIX"cw2015" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, cw2015_of_match); ++ ++static const struct of_device_id max17040_of_match[] = { ++ { .compatible = "maxim,max17040" }, ++ { .compatible = "maxim,max77836-battery" }, ++ { }, ++}; ++ ++MODULE_DEVICE_TABLE(of, max17040_of_match); ++ + static struct i2c_driver cw_bat_driver = { + .driver = { +- .name = "cellwise,cw201x", ++ .name = PREFIX"cw201x", + #ifdef CONFIG_PM + .pm = &cw_bat_pm_ops, + #endif +-- +2.25.4 + + +From 2bd793fb2cab2381524c00f7d491ce32fa65ed9b Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 16:10:26 +0100 +Subject: [PATCH 20/98] cw2015: Print of -> class fallback message only in + debug mode + +--- + drivers/power/supply/cw2015_battery.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 035c990a1a28..2bd7b49984c7 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -238,7 +238,7 @@ static int get_charge_state(struct cw_battery *cw_bat) + struct device_node* supply_of; + struct device *cw_dev = &cw_bat->client->dev; + if (!cw_dev->of_node) { +- dev_info(cw_dev, "Charger does not have an of node, scanning all supplies\n"); ++ dev_dbg(cw_dev, "Charger does not have an of node, scanning all supplies\n"); + #endif + return !!class_for_each_device(power_supply_class, NULL, cw_dev, check_charger_online); + #ifdef CONFIG_OF +-- +2.25.4 + + +From dd5f59fd34a74c2845986507fe90463dbe3fc8b3 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 16:11:10 +0100 +Subject: [PATCH 21/98] cw2015: Rename battery to cw2015-battery + +--- + drivers/power/supply/cw2015_battery.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 2bd7b49984c7..4fe85bba7a8e 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -699,7 +699,7 @@ static enum power_supply_property cw_battery_properties[] = { + }; + + static const struct power_supply_desc cw2015_bat_desc = { +- .name = "rk-bat", ++ .name = "cw2015-battery", + .type = POWER_SUPPLY_TYPE_BATTERY, + .properties = cw_battery_properties, + .num_properties = ARRAY_SIZE(cw_battery_properties), +-- +2.25.4 + + +From 5af30470ef1ccd23dc90562014ea50b276adc46e Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 16:11:31 +0100 +Subject: [PATCH 22/98] cw2015: Return actual error code of of probing if it + fails + +--- + drivers/power/supply/cw2015_battery.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 4fe85bba7a8e..886566db3b4e 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -811,7 +811,7 @@ static int cw_bat_probe(struct i2c_client *client, + if (ret < 0) { + dev_err(&client->dev, + "failed to find cw2015 platform data\n"); +- return -1; ++ return ret; + } + + cw_bat->capacity = 1; +-- +2.25.4 + + +From 6c0704b3cbb3e6213bc0128e00317a9e3e6a0913 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 16:12:40 +0100 +Subject: [PATCH 23/98] arm64: Adjust Pinebook Pro devicetree to changed cw2015 + driver + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 3a27da05197f..2edc06d40875 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -751,7 +751,7 @@ + status = "okay"; + compatible = "cellwise,cw201x"; + reg = <0x62>; +- bat_config_info = < ++ cellwise,bat-config-info = < + 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63 + 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36 + 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69 +@@ -761,9 +761,9 @@ + 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB + 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11 + >; +- monitor_sec = <5>; +- virtual_power = <0>; +- design_capacity = <9800>; ++ cellwise,monitor-interval = <5>; ++ cellwise,virtual-power = <0>; ++ cellwise,design-capacity = <9800>; + power-supplies = <&mains_charger>, <&fusb0>; + }; + }; +-- +2.25.4 + + +From eceffd3e49b89c4b3bd4e2cc3bab7585099c9758 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 23:21:35 +0100 +Subject: [PATCH 24/98] documentation: Add cellwise cw2105 devicetree binding + documentation + +--- + .../bindings/power/supply/cw2015_battery.txt | 37 +++++++++++++++++++ + 1 file changed, 37 insertions(+) + create mode 100644 Documentation/devicetree/bindings/power/supply/cw2015_battery.txt + +diff --git a/Documentation/devicetree/bindings/power/supply/cw2015_battery.txt b/Documentation/devicetree/bindings/power/supply/cw2015_battery.txt +new file mode 100644 +index 000000000000..b3fec5c91a2b +--- /dev/null ++++ b/Documentation/devicetree/bindings/power/supply/cw2015_battery.txt +@@ -0,0 +1,37 @@ ++cw2015_battery ++~~~~~~~~~~~~~~~~ ++ ++The cellwise CW2015 is a shuntless single/multi-cell battery fuel gauge. ++ ++Required properties : ++ - compatible : "cellwise,cw2015" ++ - cellwise,bat-config-info : Binary battery info ++ ++Optional properties : ++ - cellwise,monitor-interval : Measurement interval in seconds ++ - cellwise,divider-res1 : Resistance of high side voltage divider resistor ++ - cellwise,divider-res2 : Resistance of low side voltage divider resistor ++ - cellwise,virtual-power : Default to disconnected battery state (gauge in pack mode) ++ - cellwise,design-capacity : Design capacity of the battery cell in milliampere hours ++ - cellwise,alert-level : Low battery alarm level in percent ++ ++Example: ++ cw2015@62 { ++ status = "okay"; ++ compatible = "cellwise,cw201x"; ++ reg = <0x62>; ++ cellwise,bat-config-info = < ++ 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63 ++ 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36 ++ 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69 ++ 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59 ++ 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17 ++ 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D ++ 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB ++ 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11 ++ >; ++ cellwise,monitor-interval = <5>; ++ cellwise,virtual-power; ++ cellwise,design-capacity = <9800>; ++ power-supplies = <&mains_charger>, <&usb_charger>; ++ } +-- +2.25.4 + + +From 02cafb9d2ff2954ee3538e24c0db3cd87e3c3d2e Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 23:40:06 +0100 +Subject: [PATCH 25/98] cw2015: Transform separate high/low voltage divider + resistor values into multi value property + +--- + drivers/power/supply/cw2015_battery.c | 32 +++++++++++++++++++-------- + include/linux/power/cw2015_battery.h | 4 ++-- + 2 files changed, 25 insertions(+), 11 deletions(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 886566db3b4e..e400797d1718 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -448,10 +448,10 @@ static int cw_get_voltage(struct cw_battery *cw_bat) + + voltage = value16_1 * 312 / 1024; + +- if (cw_bat->plat_data.divider_res1 && +- cw_bat->plat_data.divider_res2) { +- res1 = cw_bat->plat_data.divider_res1; +- res2 = cw_bat->plat_data.divider_res2; ++ if (cw_bat->plat_data.divider_high && ++ cw_bat->plat_data.divider_low) { ++ res1 = cw_bat->plat_data.divider_high; ++ res2 = cw_bat->plat_data.divider_low; + voltage = voltage * (res1 + res2) / res2; + } + +@@ -746,15 +746,29 @@ static int cw2015_parse_dt(struct cw_battery *cw_bat) + cw_bat->bat_mode = MODE_BATTERY; + cw_bat->monitor_sec = CW2015_DEFAULT_MONITOR_SEC * CW2015_TIMER_MS_COUNTS; + +- ret = of_property_read_u32(node, PREFIX"divider-res1", &value); +- if (ret < 0) +- value = 0; +- data->divider_res1 = value; ++ prop = of_find_property(node, PREFIX"voltage-divider", &length); ++ if (prop) { ++ length /= sizeof(u32); ++ if (length != 2) { ++ dev_err(dev, "Length of voltage divider array must be 2, not %u\n", length); ++ return -EINVAL; ++ } ++ ret = of_property_read_u32_index(node, PREFIX"voltage-divider", 0, &data->divider_high); ++ if (ret) { ++ dev_err(dev, "Failed to read value of high side voltage divider resistor: %d\n", ret); ++ return ret; ++ } ++ ret = of_property_read_u32_index(node, PREFIX"voltage-divider", 1, &data->divider_low); ++ if (ret) { ++ dev_err(dev, "Failed to read value of low side voltage divider resistor: %d\n", ret); ++ return ret; ++ } ++ } + + ret = of_property_read_u32(node, PREFIX"divider-res2", &value); + if (ret < 0) + value = 0; +- data->divider_res2 = value; ++ data->divider_low = value; + + ret = of_property_read_u32(node, PREFIX"virtual-power", &value); + if (ret < 0) +diff --git a/include/linux/power/cw2015_battery.h b/include/linux/power/cw2015_battery.h +index c7abd8aa0c28..77c8ce17799f 100644 +--- a/include/linux/power/cw2015_battery.h ++++ b/include/linux/power/cw2015_battery.h +@@ -87,8 +87,8 @@ enum bat_mode { + }; + + struct cw_bat_platform_data { +- int divider_res1; +- int divider_res2; ++ u32 divider_high; ++ u32 divider_low; + u32 *cw_bat_config_info; + int design_capacity; + }; +-- +2.25.4 + + +From bbcaaf29586ecc3cb81955bb55f03f62eaf6e7bc Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 19 Nov 2019 23:55:47 +0100 +Subject: [PATCH 26/98] documentation: Update cellwise cw2015 dt binding docs + to reflect new voltage divider specification + +--- + .../devicetree/bindings/power/supply/cw2015_battery.txt | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/Documentation/devicetree/bindings/power/supply/cw2015_battery.txt b/Documentation/devicetree/bindings/power/supply/cw2015_battery.txt +index b3fec5c91a2b..e847391268f3 100644 +--- a/Documentation/devicetree/bindings/power/supply/cw2015_battery.txt ++++ b/Documentation/devicetree/bindings/power/supply/cw2015_battery.txt +@@ -5,12 +5,12 @@ The cellwise CW2015 is a shuntless single/multi-cell battery fuel gauge. + + Required properties : + - compatible : "cellwise,cw2015" +- - cellwise,bat-config-info : Binary battery info ++ - cellwise,bat-config-info : Binary battery info blob + + Optional properties : + - cellwise,monitor-interval : Measurement interval in seconds +- - cellwise,divider-res1 : Resistance of high side voltage divider resistor +- - cellwise,divider-res2 : Resistance of low side voltage divider resistor ++ - cellwise,voltage-divider : Voltage divider for multi-cell packs, ++ specified as two integer values , in ohms. + - cellwise,virtual-power : Default to disconnected battery state (gauge in pack mode) + - cellwise,design-capacity : Design capacity of the battery cell in milliampere hours + - cellwise,alert-level : Low battery alarm level in percent +-- +2.25.4 + + +From 14544923a70a79fc48ad026523e222e5b090c405 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 20 Nov 2019 21:28:55 +0100 +Subject: [PATCH 27/98] Add hacky Bluetooth + +Can't be mainlined like this. Does however work with hciattach. +For mianline Bluetooth should work through the hci_uart driver. +That one does not seems to work at all though since the device +stays unconfigured +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 25 +++++++++++-------- + net/rfkill/rfkill-gpio.c | 11 ++++++++ + 2 files changed, 25 insertions(+), 11 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 2edc06d40875..82a25a2d9962 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -206,16 +206,14 @@ + }; + + wireless-bluetooth { +- compatible = "bluetooth-platdata"; ++ compatible = "rfkill,gpio", "bluetooth-platdata"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; +- uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; +- pinctrl-names = "default", "rts_gpio"; +- pinctrl-0 = <&uart0_rts>; +- pinctrl-1 = <&uart0_gpios>; +- BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; +- BT,wake_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; +- BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_reset_gpio &bt_wake_gpio>; ++ type = "bluetooth"; ++ reset-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ shutdown-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +@@ -912,9 +910,13 @@ + }; + + wireless-bluetooth { +- uart0_gpios: uart0-gpios { ++ bt_wake_gpio: bt-wake { ++ rockchip,pins = ++ <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ bt_reset_gpio: bt-reset { + rockchip,pins = +- <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; ++ <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + }; +@@ -1021,7 +1023,8 @@ + + &uart0 { + pinctrl-names = "default"; +- pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; ++ uart-has-rtscts; + status = "okay"; + }; + +diff --git a/net/rfkill/rfkill-gpio.c b/net/rfkill/rfkill-gpio.c +index f5afc9bcdee6..075e3070440e 100644 +--- a/net/rfkill/rfkill-gpio.c ++++ b/net/rfkill/rfkill-gpio.c +@@ -148,6 +148,14 @@ static int rfkill_gpio_remove(struct platform_device *pdev) + return 0; + } + ++#ifdef CONFIG_OF ++static const struct of_device_id rfkill_of_match[] = { ++ { .compatible = "rfkill,gpio", }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, rfkill_of_match); ++#endif ++ + #ifdef CONFIG_ACPI + static const struct acpi_device_id rfkill_acpi_match[] = { + { "BCM4752", RFKILL_TYPE_GPS }, +@@ -162,6 +170,9 @@ static struct platform_driver rfkill_gpio_driver = { + .remove = rfkill_gpio_remove, + .driver = { + .name = "rfkill_gpio", ++#ifdef CONFIG_OF ++ .of_match_table = rfkill_of_match, ++#endif + .acpi_match_table = ACPI_PTR(rfkill_acpi_match), + }, + }; +-- +2.25.4 + + +From 3a31c3f3070c456a48f865051c1fa3dceba77c98 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 21 Nov 2019 21:43:11 +0100 +Subject: [PATCH 28/98] arm64: Handle Bluetooth on the Pinebook Pro via + hci_uart + +This removed the need for handling Bluetooth via hciattach. +However, the ap6255 seems to be a little quirky. It does +not provide a unique MAC address. Thus userspace needs to +set one via `btmgmt --index hci1 public-addr 43:43:a0:12:1f:aa` +or a compareable tool that can write to the HCI control management +channel. +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 31 ++++++++++++------- + 1 file changed, 19 insertions(+), 12 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 82a25a2d9962..074d8403a315 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -205,18 +205,6 @@ + status = "okay"; + }; + +- wireless-bluetooth { +- compatible = "rfkill,gpio", "bluetooth-platdata"; +- clocks = <&rk808 1>; +- clock-names = "ext_clock"; +- pinctrl-names = "default"; +- pinctrl-0 = <&bt_reset_gpio &bt_wake_gpio>; +- type = "bluetooth"; +- reset-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; +- shutdown-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; +- status = "okay"; +- }; +- + es8316-sound { + status = "okay"; + compatible = "simple-audio-card"; +@@ -914,6 +902,11 @@ + rockchip,pins = + <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; ++ bt_host_wake_gpio: bt-host-wake { ++ rockchip,pins = ++ <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ + bt_reset_gpio: bt-reset { + rockchip,pins = + <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; +@@ -1021,11 +1014,25 @@ + }; + }; + ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + uart-has-rtscts; + status = "okay"; ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; ++ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; ++// Enabling the host wakeup GPIO seems to make bluetooth less stable ++// further investigation required ++// host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ max-speed = <1500000>; ++ vbat-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc_1v8>; ++ }; + }; + + &uart2 { +-- +2.25.4 + + +From 104a5533553b0f04e806963b7770028c504d2b22 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 14:56:56 +0100 +Subject: [PATCH 29/98] amd64: Enable bluetooth host wakeup gpio on Pinebook + Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 074d8403a315..7d2fd0a319b5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -1026,9 +1026,7 @@ + pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; +-// Enabling the host wakeup GPIO seems to make bluetooth less stable +-// further investigation required +-// host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + vbat-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; +-- +2.25.4 + + +From c5b1a59ef90d96ff4037533c683d5ca20e198905 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 14:57:45 +0100 +Subject: [PATCH 30/98] amd64: Add low power clock to bluetooth on Pinebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 7d2fd0a319b5..77dd9a39b0d7 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -1020,8 +1020,11 @@ + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + uart-has-rtscts; + status = "okay"; ++ + bluetooth { + compatible = "brcm,bcm4345c5"; ++ clocks = <&rk808 1>; ++ clock-names = "lpo"; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; +-- +2.25.4 + + +From 2cd67caaffe4d6b29763d541b61d659772018ec7 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 14:58:24 +0100 +Subject: [PATCH 31/98] drivers/bluetooth: hci_uart: Clear regsitered flag on + device unregister + +--- + drivers/bluetooth/hci_serdev.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/bluetooth/hci_serdev.c b/drivers/bluetooth/hci_serdev.c +index 4652896d4990..72270f01e580 100644 +--- a/drivers/bluetooth/hci_serdev.c ++++ b/drivers/bluetooth/hci_serdev.c +@@ -364,5 +364,7 @@ void hci_uart_unregister_device(struct hci_uart *hu) + + hu->proto->close(hu); + serdev_device_close(hu->serdev); ++ ++ clear_bit(HCI_UART_REGISTERED, &hu->flags); + } + EXPORT_SYMBOL_GPL(hci_uart_unregister_device); +-- +2.25.4 + + +From 0e5a67383a6dc3f2a5a19c7c008b55393903bf4b Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 15:00:15 +0100 +Subject: [PATCH 32/98] drivers/bluetooth: hci_uart: Add shutdown handler + +This commit adds a proper deinitialization procedure to the +Broadcom part of hci_uart. +The AP6256 seems to be extremly picky about power sequencing. +When the BT_REG_ON pin is held high while power is reapplied the +module becomes unstable and stops working at random. +--- + drivers/bluetooth/hci_bcm.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c +index 7646636f2d18..cc16035959d6 100644 +--- a/drivers/bluetooth/hci_bcm.c ++++ b/drivers/bluetooth/hci_bcm.c +@@ -1165,6 +1165,22 @@ static int bcm_remove(struct platform_device *pdev) + return 0; + } + ++static void bcm_shutdown(struct platform_device *pdev) ++{ ++ struct bcm_device *dev = platform_get_drvdata(pdev); ++ ++ if (test_bit(HCI_UART_REGISTERED, &dev->hu->flags)) { ++ hci_uart_unregister_device(&dev->serdev_hu); ++ } ++ ++ bcm_remove(pdev); ++ dev_info(&pdev->dev, "Cutting power to bluetooth module\n"); ++ if (bcm_gpio_set_power(dev, false)) { ++ dev_err(&pdev->dev, "Failed to power down\n"); ++ } ++ usleep_range(500000, 1000000); ++} ++ + static const struct hci_uart_proto bcm_proto = { + .id = HCI_UART_BCM, + .name = "Broadcom", +@@ -1362,6 +1378,7 @@ static const struct dev_pm_ops bcm_pm_ops = { + static struct platform_driver bcm_driver = { + .probe = bcm_probe, + .remove = bcm_remove, ++ .shutdown = bcm_shutdown, + .driver = { + .name = "hci_bcm", + .acpi_match_table = ACPI_PTR(bcm_acpi_match), +-- +2.25.4 + + +From 21f346848986bd6b60ad5d4e3df1542c294692b2 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 15:10:50 +0100 +Subject: [PATCH 33/98] arm64: Update Pinebook Pro defconfig to add rk3399 VPU + support + +Also build cw2015_battery as module +--- + arch/arm64/configs/pinebook_pro_defconfig | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index f939d2b68f12..d56543fc1223 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -588,7 +588,6 @@ CONFIG_BT_BNEP_MC_FILTER=y + CONFIG_BT_BNEP_PROTO_FILTER=y + CONFIG_BT_HIDP=m + CONFIG_BT_6LOWPAN=m +-# CONFIG_BT_DEBUGFS is not set + CONFIG_BT_HCIBTUSB=m + CONFIG_BT_HCIBTSDIO=m + CONFIG_BT_HCIUART=m +@@ -1075,6 +1074,8 @@ CONFIG_BRCMSMAC=m + CONFIG_BRCMFMAC=m + CONFIG_BRCMFMAC_USB=y + CONFIG_BRCMFMAC_PCIE=y ++CONFIG_BRCM_TRACING=y ++CONFIG_BRCMDBG=y + CONFIG_IPW2100=m + CONFIG_IPW2100_MONITOR=y + CONFIG_IPW2200=m +@@ -1366,7 +1367,7 @@ CONFIG_POWER_RESET_XGENE=y + CONFIG_POWER_RESET_SYSCON=y + CONFIG_POWER_RESET_SYSCON_POWEROFF=y + CONFIG_SYSCON_REBOOT_MODE=y +-CONFIG_BATTERY_CW2015=y ++CONFIG_BATTERY_CW2015=m + CONFIG_BATTERY_SBS=m + CONFIG_CHARGER_SBS=m + CONFIG_MANAGER_SBS=m +@@ -2392,6 +2393,7 @@ CONFIG_AD5933=m + CONFIG_ADE7854=m + CONFIG_AD2S1210=m + CONFIG_STAGING_MEDIA=y ++CONFIG_VIDEO_HANTRO=y + CONFIG_FB_TFT=m + CONFIG_FB_TFT_AGM1264K_FL=m + CONFIG_FB_TFT_BD663474=m +-- +2.25.4 + + +From 3a9f40e4a1ac7979aa3fae178c569d23c0f719de Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 17:12:58 +0100 +Subject: [PATCH 34/98] tty: serdev: Add shutdown callback to serdev driver ops + +--- + drivers/tty/serdev/core.c | 11 +++++++++++ + include/linux/serdev.h | 1 + + 2 files changed, 12 insertions(+) + +diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c +index a0ac16ee6575..a43e2ae1492d 100644 +--- a/drivers/tty/serdev/core.c ++++ b/drivers/tty/serdev/core.c +@@ -431,11 +431,22 @@ static int serdev_drv_remove(struct device *dev) + return 0; + } + ++static void serdev_drv_shutdown(struct device *dev) ++{ ++ const struct serdev_device_driver *sdrv; ++ if (dev->driver) { ++ sdrv = to_serdev_device_driver(dev->driver); ++ if (sdrv->shutdown) ++ sdrv->shutdown(to_serdev_device(dev)); ++ } ++} ++ + static struct bus_type serdev_bus_type = { + .name = "serial", + .match = serdev_device_match, + .probe = serdev_drv_probe, + .remove = serdev_drv_remove, ++ .shutdown = serdev_drv_shutdown, + }; + + /** +diff --git a/include/linux/serdev.h b/include/linux/serdev.h +index 9f14f9c12ec4..94050561325c 100644 +--- a/include/linux/serdev.h ++++ b/include/linux/serdev.h +@@ -63,6 +63,7 @@ struct serdev_device_driver { + struct device_driver driver; + int (*probe)(struct serdev_device *); + void (*remove)(struct serdev_device *); ++ void (*shutdown)(struct serdev_device *); + }; + + static inline struct serdev_device_driver *to_serdev_device_driver(struct device_driver *d) +-- +2.25.4 + + +From f32e000ec927665bd4473b79cee90a0a268c6ed0 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 17:13:59 +0100 +Subject: [PATCH 35/98] bluetooth: hci_uart: Move device power sequence fix to + serdev shutdown + +Since hci_uart is on a serdev bus its shutdown function is not called. +--- + drivers/bluetooth/hci_bcm.c | 35 ++++++++++++++++++----------------- + 1 file changed, 18 insertions(+), 17 deletions(-) + +diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c +index cc16035959d6..76ff64e5c53b 100644 +--- a/drivers/bluetooth/hci_bcm.c ++++ b/drivers/bluetooth/hci_bcm.c +@@ -1165,22 +1165,6 @@ static int bcm_remove(struct platform_device *pdev) + return 0; + } + +-static void bcm_shutdown(struct platform_device *pdev) +-{ +- struct bcm_device *dev = platform_get_drvdata(pdev); +- +- if (test_bit(HCI_UART_REGISTERED, &dev->hu->flags)) { +- hci_uart_unregister_device(&dev->serdev_hu); +- } +- +- bcm_remove(pdev); +- dev_info(&pdev->dev, "Cutting power to bluetooth module\n"); +- if (bcm_gpio_set_power(dev, false)) { +- dev_err(&pdev->dev, "Failed to power down\n"); +- } +- usleep_range(500000, 1000000); +-} +- + static const struct hci_uart_proto bcm_proto = { + .id = HCI_UART_BCM, + .name = "Broadcom", +@@ -1378,7 +1362,6 @@ static const struct dev_pm_ops bcm_pm_ops = { + static struct platform_driver bcm_driver = { + .probe = bcm_probe, + .remove = bcm_remove, +- .shutdown = bcm_shutdown, + .driver = { + .name = "hci_bcm", + .acpi_match_table = ACPI_PTR(bcm_acpi_match), +@@ -1433,6 +1416,23 @@ static void bcm_serdev_remove(struct serdev_device *serdev) + hci_uart_unregister_device(&bcmdev->serdev_hu); + } + ++static void bcm_serdev_shutdown(struct serdev_device *serdev) ++{ ++ struct bcm_device *bcmdev = serdev_device_get_drvdata(serdev); ++ ++/* ++ if (test_bit(HCI_UART_REGISTERED, &bcmdev->hu->flags)) { ++ hci_uart_unregister_device(&bcmdev->serdev_hu); ++ } ++*/ ++ dev_info(bcmdev->dev, "Cutting power to bluetooth module\n"); ++ if (bcm_gpio_set_power(bcmdev, false)) { ++ dev_err(bcmdev->dev, "Failed to power down\n"); ++ } ++ usleep_range(500000, 1000000); ++} ++ ++ + #ifdef CONFIG_OF + static const struct of_device_id bcm_bluetooth_of_match[] = { + { .compatible = "brcm,bcm20702a1" }, +@@ -1447,6 +1447,7 @@ MODULE_DEVICE_TABLE(of, bcm_bluetooth_of_match); + static struct serdev_device_driver bcm_serdev_driver = { + .probe = bcm_serdev_probe, + .remove = bcm_serdev_remove, ++ .shutdown = bcm_serdev_shutdown, + .driver = { + .name = "hci_uart_bcm", + .of_match_table = of_match_ptr(bcm_bluetooth_of_match), +-- +2.25.4 + + +From 2b36ed204a905a347c702c7b7bd6308c7ac34614 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 17:17:27 +0100 +Subject: [PATCH 36/98] mmc/core: pwrseq-simple: Power off on shutdown + +Hack to ensure power sequencing on SDIO devices +--- + drivers/mmc/core/pwrseq_simple.c | 19 ++++++++++++++++--- + 1 file changed, 16 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index ea4d3670560e..38fe7e29aba6 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -80,10 +80,8 @@ static void mmc_pwrseq_simple_post_power_on(struct mmc_host *host) + msleep(pwrseq->post_power_on_delay_ms); + } + +-static void mmc_pwrseq_simple_power_off(struct mmc_host *host) ++static void __mmc_pwrseq_simple_power_off(struct mmc_pwrseq_simple *pwrseq) + { +- struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); +- + mmc_pwrseq_simple_set_gpios_value(pwrseq, 1); + + if (pwrseq->power_off_delay_us) +@@ -96,6 +94,12 @@ static void mmc_pwrseq_simple_power_off(struct mmc_host *host) + } + } + ++static void mmc_pwrseq_simple_power_off(struct mmc_host *host) ++{ ++ struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); ++ __mmc_pwrseq_simple_power_off(pwrseq); ++} ++ + static const struct mmc_pwrseq_ops mmc_pwrseq_simple_ops = { + .pre_power_on = mmc_pwrseq_simple_pre_power_on, + .post_power_on = mmc_pwrseq_simple_post_power_on, +@@ -151,9 +155,18 @@ static int mmc_pwrseq_simple_remove(struct platform_device *pdev) + return 0; + } + ++static void mmc_pwrseq_simple_shutdown(struct platform_device *pdev) ++{ ++ struct mmc_pwrseq_simple *pwrseq = platform_get_drvdata(pdev); ++ ++ dev_info(&pdev->dev, "Turning off mmc\n"); ++ __mmc_pwrseq_simple_power_off(pwrseq); ++} ++ + static struct platform_driver mmc_pwrseq_simple_driver = { + .probe = mmc_pwrseq_simple_probe, + .remove = mmc_pwrseq_simple_remove, ++ .shutdown = mmc_pwrseq_simple_shutdown, + .driver = { + .name = "pwrseq_simple", + .of_match_table = mmc_pwrseq_simple_of_match, +-- +2.25.4 + + +From 09c6f1823bb139f47ca0f39c714283b925bf486b Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 23:12:23 +0100 +Subject: [PATCH 37/98] arm64: Add longer powerup/powerdown delays to SDIO WiFi + power sequence + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 77dd9a39b0d7..d474812a15c1 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -186,6 +186,8 @@ + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; ++ power-off-delay-us = <500000>; ++ post-power-on-delay-ms = <100>; + + /* + * On the module itself this is one of these (depending +-- +2.25.4 + + +From 6467dcf7a635c143c58697ac7465aa35e3aa463d Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 23 Nov 2019 23:14:07 +0100 +Subject: [PATCH 38/98] arm64: Remove superfluous devicetree properties from + Pinebook Pro + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 38 ------------------- + 1 file changed, 38 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index d474812a15c1..d5bc19644d2b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -247,15 +247,6 @@ + sound-name-prefix = "Speaker Amplifier"; + }; + +- fan0: pwm-fan { +- compatible = "pwm-fan"; +- pwms = <&pwm1 0 10000 0>; +- cooling-min-state = <0>; +- cooling-max-state = <3>; +- #cooling-cells = <2>; +- cooling-levels = <0 102 170 230>; +- }; +- + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; +@@ -353,32 +344,7 @@ + extcon = <&fusb0>; + }; + }; +-/* +-&display_subsystem { +- status = "okay"; +- +- ports = <&vopb_out>, <&vopl_out>; +- logo-memory-region = <&drm_logo>; +- +- route { +- route_dp: route-dp { +- logo,uboot = "logo.bmp"; +- logo,kernel = "logo_kernel.bmp"; +- logo,mode = "center"; +- charge_logo,mode = "center"; +- connect = <&vopl_out_dp>; +- }; + +- route_edp: route-edp { +- logo,uboot = "logo.bmp"; +- logo,kernel = "logo_kernel.bmp"; +- logo,mode = "center"; +- charge_logo,mode = "center"; +- connect = <&vopb_out_edp>; +- }; +- }; +-}; +-*/ + &edp { + status = "okay"; + pinctrl-names = "default"; +@@ -920,10 +886,6 @@ + status = "okay"; + }; + +-&pwm1 { +- status = "okay"; +-}; +- + &pwm2 { + status = "okay"; + }; +-- +2.25.4 + + +From e2ac96dfa9f6e2fefc010f8ba9da153be40c7325 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Mon, 25 Nov 2019 21:05:04 +0100 +Subject: [PATCH 39/98] drivers/power: cw2015_battery: Add design + charge_full_design_property + +Thanks to schaecsn for this suggestion +--- + drivers/power/supply/cw2015_battery.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index e400797d1718..3703ba3b96d0 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -655,6 +655,7 @@ static int cw_battery_get_property(struct power_supply *psy, + break; + + case POWER_SUPPLY_PROP_CHARGE_FULL: ++ case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: + val->intval = cw_bat->plat_data.design_capacity * 1000; + break; + +@@ -694,6 +695,7 @@ static enum power_supply_property cw_battery_properties[] = { + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_CHARGE_COUNTER, + POWER_SUPPLY_PROP_CHARGE_FULL, ++ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_CURRENT_NOW, + }; +-- +2.25.4 + + +From 5849f8d566487977eb1b02ca0dd61c5f0179f82c Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 26 Nov 2019 13:57:44 +0100 +Subject: [PATCH 40/98] arm64/dts: Remove fusb302 extcon for tcphy and usb + +While this does not reflect the hardware it does at least make the usbc port +usable for normal USB operation +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index d5bc19644d2b..0f05eba03bf7 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -936,7 +936,7 @@ + }; + + &tcphy0 { +- extcon = <&fusb0>; ++// extcon = <&fusb0>; + status = "okay"; + }; + +@@ -1021,7 +1021,7 @@ + }; + + &usbdrd3_0 { +- extcon = <&fusb0>; ++// extcon = <&fusb0>; + status = "okay"; + }; + +-- +2.25.4 + + +From d7bd351eff336351e048a7c07de9bd4d46827351 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 26 Nov 2019 19:20:34 +0100 +Subject: [PATCH 41/98] usb/typec: tcpm: Add generic extcon for tcpm-enabled + devices + +Incomplete and hacky +--- + drivers/usb/typec/tcpm/tcpm.c | 78 +++++++++++++++++++++++++++++++++-- + 1 file changed, 75 insertions(+), 3 deletions(-) + +diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c +index 5f61d9977a15..de4c47d1a394 100644 +--- a/drivers/usb/typec/tcpm/tcpm.c ++++ b/drivers/usb/typec/tcpm/tcpm.c +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -322,6 +323,12 @@ struct tcpm_port { + /* port belongs to a self powered device */ + bool self_powered; + ++ ++#ifdef CONFIG_EXTCON ++ struct extcon_dev *extcon; ++ unsigned int *extcon_cables; ++#endif ++ + #ifdef CONFIG_DEBUG_FS + struct dentry *dentry; + struct mutex logbuffer_lock; /* log buffer access lock */ +@@ -608,6 +615,33 @@ static void tcpm_debugfs_exit(const struct tcpm_port *port) { } + + #endif + ++static void tcpm_update_extcon_data(struct tcpm_port *port, bool attached) { ++#ifdef CONFIG_EXTCON ++ unsigned int *capability = port->extcon_cables; ++ if (port->data_role == TYPEC_HOST) { ++ extcon_set_state(port->extcon, EXTCON_USB, false); ++ extcon_set_state(port->extcon, EXTCON_USB_HOST, attached); ++ } else { ++ extcon_set_state(port->extcon, EXTCON_USB, true); ++ extcon_set_state(port->extcon, EXTCON_USB_HOST, attached); ++ } ++ while(*capability != EXTCON_NONE) { ++ union extcon_property_value val; ++ val.intval = true; ++ extcon_set_property(port->extcon, *capability, EXTCON_PROP_USB_SS, val); ++ val.intval = (port->polarity == TYPEC_POLARITY_CC2); ++ extcon_set_property(port->extcon, *capability, ++ EXTCON_PROP_USB_TYPEC_POLARITY, val); ++ extcon_sync(port->extcon, *capability); ++ capability++; ++ } ++ tcpm_log(port, "Extcon update (%s): %s, %s", ++ attached ? "attached" : "detached", ++ port->data_role == TYPEC_HOST ? "host" : "device", ++ port->polarity == TYPEC_POLARITY_CC1 ? "normal" : "flipped"); ++#endif ++} ++ + static int tcpm_pd_transmit(struct tcpm_port *port, + enum tcpm_transmit_type type, + const struct pd_message *msg) +@@ -797,10 +831,11 @@ static int tcpm_set_roles(struct tcpm_port *port, bool attached, + else + orientation = TYPEC_ORIENTATION_REVERSE; + +- if (data == TYPEC_HOST) ++ if (data == TYPEC_HOST) { + usb_role = USB_ROLE_HOST; +- else ++ } else { + usb_role = USB_ROLE_DEVICE; ++ } + + ret = tcpm_mux_set(port, TYPEC_STATE_USB, usb_role, orientation); + if (ret < 0) +@@ -815,6 +850,8 @@ static int tcpm_set_roles(struct tcpm_port *port, bool attached, + typec_set_data_role(port->typec_port, data); + typec_set_pwr_role(port->typec_port, role); + ++ tcpm_update_extcon_data(port, attached); ++ + return 0; + } + +@@ -1025,7 +1062,7 @@ static void svdm_consume_modes(struct tcpm_port *port, const __le32 *payload, + paltmode->mode = i; + paltmode->vdo = le32_to_cpu(payload[i]); + +- tcpm_log(port, " Alternate mode %d: SVID 0x%04x, VDO %d: 0x%08x", ++ tcpm_log(port, "Alternate mode %d: SVID 0x%04x, VDO %d: 0x%08x", + pmdata->altmodes, paltmode->svid, + paltmode->mode, paltmode->vdo); + +@@ -2730,6 +2767,8 @@ static void tcpm_detach(struct tcpm_port *port) + port->hard_reset_count = 0; + + tcpm_reset_port(port); ++ ++ tcpm_update_extcon_data(port, false); + } + + static void tcpm_src_detach(struct tcpm_port *port) +@@ -4396,6 +4435,10 @@ static int tcpm_copy_vdos(u32 *dest_vdo, const u32 *src_vdo, + return nr_vdo; + } + ++unsigned int default_supported_cables[] = { ++ EXTCON_NONE ++}; ++ + static int tcpm_fw_get_caps(struct tcpm_port *port, + struct fwnode_handle *fwnode) + { +@@ -4406,6 +4449,23 @@ static int tcpm_fw_get_caps(struct tcpm_port *port, + if (!fwnode) + return -EINVAL; + ++#ifdef CONFIG_EXTCON ++ ret = fwnode_property_count_u32(fwnode, "extcon-cables"); ++ if (ret > 0) { ++ port->extcon_cables = devm_kzalloc(port->dev, sizeof(u32) * ret, GFP_KERNEL); ++ if (!port->extcon_cables) { ++ dev_err(port->dev, "Failed to allocate memory for extcon cable types. "\ ++ "Using default tyes"); ++ goto extcon_default; ++ } ++ fwnode_property_read_u32_array(fwnode, "extcon-cables", port->extcon_cables, ret); ++ } else { ++extcon_default: ++ dev_info(port->dev, "No cable types defined, using default cables"); ++ port->extcon_cables = default_supported_cables; ++ } ++#endif ++ + /* USB data support is optional */ + ret = fwnode_property_read_string(fwnode, "data-role", &cap_str); + if (ret == 0) { +@@ -4769,6 +4829,18 @@ struct tcpm_port *tcpm_register_port(struct device *dev, struct tcpc_dev *tcpc) + else + port->try_role = TYPEC_NO_PREFERRED_ROLE; + ++#ifdef CONFIG_EXTCON ++ port->extcon = devm_extcon_dev_allocate(dev, port->extcon_cables); ++ if (IS_ERR(port->extcon)) { ++ dev_err(dev, "Failed to allocate extcon device: %ld", PTR_ERR(port->extcon)); ++ goto out_destroy_wq; ++ } ++ if((err = devm_extcon_dev_register(dev, port->extcon))) { ++ dev_err(dev, "Failed to register extcon device: %d", err); ++ goto out_destroy_wq; ++ } ++#endif ++ + port->typec_caps.fwnode = tcpc->fwnode; + port->typec_caps.revision = 0x0120; /* Type-C spec release 1.2 */ + port->typec_caps.pd_revision = 0x0300; /* USB-PD spec release 3.0 */ +-- +2.25.4 + + +From bb11f0ada4fe475bc3e2d87358488cd68e71735c Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 26 Nov 2019 19:21:26 +0100 +Subject: [PATCH 42/98] phy/rockchip: rockchip_typec_phy: Set phy capabilities + on extcon port + +Force capability flags on an external port attached via extcon. +--- + drivers/phy/rockchip/phy-rockchip-typec.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c +index 24563160197f..be0ce0c113c0 100644 +--- a/drivers/phy/rockchip/phy-rockchip-typec.c ++++ b/drivers/phy/rockchip/phy-rockchip-typec.c +@@ -40,6 +40,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -1160,6 +1161,19 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev) + dev_err(dev, "Invalid or missing extcon\n"); + return PTR_ERR(tcphy->extcon); + } ++ } else { ++ extcon_set_property_capability(tcphy->extcon, EXTCON_USB, ++ EXTCON_PROP_USB_SS); ++ extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST, ++ EXTCON_PROP_USB_SS); ++ extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP, ++ EXTCON_PROP_USB_SS); ++ extcon_set_property_capability(tcphy->extcon, EXTCON_USB, ++ EXTCON_PROP_USB_TYPEC_POLARITY); ++ extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST, ++ EXTCON_PROP_USB_TYPEC_POLARITY); ++ extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP, ++ EXTCON_PROP_USB_TYPEC_POLARITY); + } + + pm_runtime_enable(dev); +-- +2.25.4 + + +From ce3332954f93838a09cba398aa2795a3a1858386 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 26 Nov 2019 19:24:30 +0100 +Subject: [PATCH 43/98] arm64/dts: Enable USB functionality of USB-C port of + Pinebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 0f05eba03bf7..45d580651276 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -698,6 +698,7 @@ + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <1000000>; ++ extcon-cables = <1 2 5 6 9 10 12 44>; + }; + }; + +@@ -936,7 +937,7 @@ + }; + + &tcphy0 { +-// extcon = <&fusb0>; ++ extcon = <&fusb0>; + status = "okay"; + }; + +@@ -1021,13 +1022,12 @@ + }; + + &usbdrd3_0 { +-// extcon = <&fusb0>; + status = "okay"; + }; + + &usbdrd_dwc3_0 { + status = "okay"; +- dr_mode = "otg"; ++ dr_mode = "host"; + }; + + &usbdrd3_1 { +-- +2.25.4 + + +From dd3fdfd5ada4d32c24ebf6a1fc7d330f67296a43 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 29 Nov 2019 18:05:38 +0100 +Subject: [PATCH 44/98] usb/typec: bus: Catch invalid attention calls + +Had one or two crashes during dev. Needs further investigation +--- + drivers/usb/typec/bus.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/typec/bus.c b/drivers/usb/typec/bus.c +index 74cb3c2ecb34..be528066b46a 100644 +--- a/drivers/usb/typec/bus.c ++++ b/drivers/usb/typec/bus.c +@@ -148,8 +148,14 @@ EXPORT_SYMBOL_GPL(typec_altmode_exit); + */ + void typec_altmode_attention(struct typec_altmode *adev, u32 vdo) + { +- struct typec_altmode *pdev = &to_altmode(adev)->partner->adev; ++ struct typec_altmode *pdev; ++ WARN_ONCE(!adev, "typec bus attention: adev is NULL!"); ++ WARN_ONCE(!to_altmode(adev)->partner, "typec bus attention: partner is NULL!"); ++ if(!adev || !to_altmode(adev)->partner) { ++ return; ++ } + ++ pdev = &to_altmode(adev)->partner->adev; + if (pdev->ops && pdev->ops->attention) + pdev->ops->attention(pdev, vdo); + } +-- +2.25.4 + + +From 0d391b58ff1f4ccf0f4b20a21137af409929ac34 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 29 Nov 2019 18:07:34 +0100 +Subject: [PATCH 45/98] usb/typec: tcpm: Add generic extcon to tcpm + +This patch adds automatic extcon creation to the tcpm driver. This patch +is incomplete and needs some work regarding support of all the available +extcon states and their management. +To make proper use of this extension this patch adds loading of supported +port altmodes from devicetrees, too. +--- + drivers/usb/typec/tcpm/tcpm.c | 65 +++++++++++++++++++++++++++++++++++ + 1 file changed, 65 insertions(+) + +diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c +index de4c47d1a394..79955a6e8af5 100644 +--- a/drivers/usb/typec/tcpm/tcpm.c ++++ b/drivers/usb/typec/tcpm/tcpm.c +@@ -1082,6 +1082,9 @@ static void tcpm_register_partner_altmodes(struct tcpm_port *port) + if (!altmode) + tcpm_log(port, "Failed to register partner SVID 0x%04x", + modep->altmode_desc[i].svid); ++ else ++ tcpm_log(port, "Registered altmode 0x%04x", modep->altmode_desc[i].svid); ++ + port->partner_altmode[i] = altmode; + } + } +@@ -1185,9 +1188,11 @@ static int tcpm_pd_svdm(struct tcpm_port *port, const __le32 *payload, int cnt, + modep->svid_index++; + if (modep->svid_index < modep->nsvids) { + u16 svid = modep->svids[modep->svid_index]; ++ tcpm_log(port, "More modes available, sending discover"); + response[0] = VDO(svid, 1, CMD_DISCOVER_MODES); + rlen = 1; + } else { ++ tcpm_log(port, "Got all patner modes, registering"); + tcpm_register_partner_altmodes(port); + } + break; +@@ -4439,6 +4444,60 @@ unsigned int default_supported_cables[] = { + EXTCON_NONE + }; + ++static int tcpm_fw_get_caps_late(struct tcpm_port *port, ++ struct fwnode_handle *fwnode) ++{ ++ int ret, i; ++ ret = fwnode_property_count_u32(fwnode, "typec-altmodes"); ++ if (ret > 0) { ++ u32 *props; ++ if (ret % 4) { ++ dev_err(port->dev, "Length of typec altmode array must be divisible by 4"); ++ return -EINVAL; ++ } ++ ++ props = devm_kzalloc(port->dev, sizeof(u32) * ret, GFP_KERNEL); ++ if (!props) { ++ dev_err(port->dev, "Failed to allocate memory for altmode properties"); ++ return -ENOMEM; ++ } ++ ++ if(fwnode_property_read_u32_array(fwnode, "typec-altmodes", props, ret) < 0) { ++ dev_err(port->dev, "Failed to read altmodes from port"); ++ return -EINVAL; ++ } ++ ++ i = 0; ++ while (ret > 0 && i < ARRAY_SIZE(port->port_altmode)) { ++ struct typec_altmode *alt; ++ struct typec_altmode_desc alt_desc = { ++ .svid = props[i * 4], ++ .mode = props[i * 4 + 1], ++ .vdo = props[i * 4 + 2], ++ .roles = props[i * 4 + 3], ++ }; ++ ++ ++ tcpm_log(port, "Adding altmode SVID: 0x%04x, mode: %d, vdo: %u, role: %d", ++ alt_desc.svid, alt_desc.mode, alt_desc.vdo, alt_desc.roles); ++ alt = typec_port_register_altmode(port->typec_port, ++ &alt_desc); ++ if (IS_ERR(alt)) { ++ tcpm_log(port, ++ "%s: failed to register port alternate mode 0x%x", ++ dev_name(port->dev), alt_desc.svid); ++ break; ++ } ++ typec_altmode_set_drvdata(alt, port); ++ alt->ops = &tcpm_altmode_ops; ++ port->port_altmode[i] = alt; ++ i++; ++ ret -= 4; ++ } ++ } ++ return 0; ++} ++ + static int tcpm_fw_get_caps(struct tcpm_port *port, + struct fwnode_handle *fwnode) + { +@@ -4892,6 +4951,12 @@ struct tcpm_port *tcpm_register_port(struct device *dev, struct tcpc_dev *tcpc) + } + } + ++ err = tcpm_fw_get_caps_late(port, tcpc->fwnode); ++ if (err < 0) { ++ dev_err(dev, "Failed to get altmodes from fwnode"); ++ goto out_destroy_wq; ++ } ++ + mutex_lock(&port->lock); + tcpm_init(port); + mutex_unlock(&port->lock); +-- +2.25.4 + + +From 051fb07be3eab78d04c9a419ebb673bbf9ddd85a Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 29 Nov 2019 18:15:16 +0100 +Subject: [PATCH 46/98] usb/typec: displayport: Add extcon support + +This patch adds extcon support to the displayport alternate mode. +This patch is not perfect. It does not clear the extcon DP +flag correctly once the DP altmode capable device is unplugged. +Needs work! +--- + drivers/usb/typec/altmodes/displayport.c | 51 ++++++++++++++++++++++-- + 1 file changed, 48 insertions(+), 3 deletions(-) + +diff --git a/drivers/usb/typec/altmodes/displayport.c b/drivers/usb/typec/altmodes/displayport.c +index 4092248a5936..bae1cbc7f101 100644 +--- a/drivers/usb/typec/altmodes/displayport.c ++++ b/drivers/usb/typec/altmodes/displayport.c +@@ -9,6 +9,8 @@ + */ + + #include ++#include ++#include + #include + #include + #include +@@ -134,15 +136,49 @@ static int dp_altmode_status_update(struct dp_altmode *dp) + return ret; + } + ++static void dp_altmode_update_extcon(struct dp_altmode *dp, bool disconnect) { ++ const struct device *dev = &dp->port->dev; ++ struct extcon_dev* edev = NULL; ++ ++ while (dev) { ++ edev = extcon_find_edev_by_node(dev->of_node); ++ if(!IS_ERR(edev)) { ++ break; ++ } ++ dev = dev->parent; ++ } ++ ++ if (IS_ERR_OR_NULL(edev)) { ++ return; ++ } ++ ++ if (disconnect || !dp->data.conf) { ++ extcon_set_state_sync(edev, EXTCON_DISP_DP, false); ++ } else { ++ extcon_set_state_sync(edev, EXTCON_DISP_DP, true); ++ if (DP_CONF_GET_PIN_ASSIGN(dp->data.conf) & DP_PIN_ASSIGN_MULTI_FUNC_MASK) { ++ extcon_set_state_sync(edev, EXTCON_USB_HOST, true); ++ } else { ++ extcon_set_state_sync(edev, EXTCON_USB_HOST, false); ++ } ++ extcon_set_state_sync(edev, EXTCON_USB, false); ++ } ++ ++} ++ + static int dp_altmode_configured(struct dp_altmode *dp) + { + int ret; + + sysfs_notify(&dp->alt->dev.kobj, "displayport", "configuration"); + +- if (!dp->data.conf) ++ if (!dp->data.conf) { ++ dp_altmode_update_extcon(dp, true); + return typec_altmode_notify(dp->alt, TYPEC_STATE_USB, + &dp->data); ++ } ++ ++ dp_altmode_update_extcon(dp, false); + + ret = dp_altmode_notify(dp); + if (ret) +@@ -169,9 +205,11 @@ static int dp_altmode_configure_vdm(struct dp_altmode *dp, u32 conf) + if (ret) { + if (DP_CONF_GET_PIN_ASSIGN(dp->data.conf)) + dp_altmode_notify(dp); +- else ++ else { ++ dp_altmode_update_extcon(dp, true); + typec_altmode_notify(dp->alt, TYPEC_STATE_USB, + &dp->data); ++ } + } + + return ret; +@@ -210,6 +248,8 @@ static void dp_altmode_work(struct work_struct *work) + case DP_STATE_EXIT: + if (typec_altmode_exit(dp->alt)) + dev_err(&dp->alt->dev, "Exit Mode Failed!\n"); ++ else ++ dp_altmode_update_extcon(dp, true); + break; + default: + break; +@@ -519,8 +559,13 @@ int dp_altmode_probe(struct typec_altmode *alt) + if (!(DP_CAP_DFP_D_PIN_ASSIGN(port->vdo) & + DP_CAP_UFP_D_PIN_ASSIGN(alt->vdo)) && + !(DP_CAP_UFP_D_PIN_ASSIGN(port->vdo) & +- DP_CAP_DFP_D_PIN_ASSIGN(alt->vdo))) ++ DP_CAP_DFP_D_PIN_ASSIGN(alt->vdo))) { ++ dev_err(&alt->dev, "No compatible pin configuration found:"\ ++ "%04lx -> %04lx, %04lx <- %04lx", ++ DP_CAP_DFP_D_PIN_ASSIGN(port->vdo), DP_CAP_UFP_D_PIN_ASSIGN(alt->vdo), ++ DP_CAP_UFP_D_PIN_ASSIGN(port->vdo), DP_CAP_DFP_D_PIN_ASSIGN(alt->vdo)); + return -ENODEV; ++ } + + ret = sysfs_create_group(&alt->dev.kobj, &dp_altmode_group); + if (ret) +-- +2.25.4 + + +From 1fd8e585edda62b25cf800fe9763eb2831aa35f9 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 29 Nov 2019 18:18:23 +0100 +Subject: [PATCH 47/98] arm64/dts: Enable CDN DP controller on the Pinebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 45d580651276..f0d292f0c7fa 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -365,6 +365,11 @@ + }; + }; + ++&cdn_dp { ++ status = "okay"; ++ extcon = <&fusb0>; ++}; ++ + &cpu_l0 { + cpu-supply = <&vdd_cpu_l>; + }; +-- +2.25.4 + + +From 3a19e55fd447e1174dc1c265c9364c92976949e7 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 29 Nov 2019 18:19:30 +0100 +Subject: [PATCH 48/98] arm64/dts: Add DP altmode to USB type C port on the + Pinebook Pro + +Advertises support for pin configurations C, D and E +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index f0d292f0c7fa..3a5121c458c2 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -704,6 +704,7 @@ + sink-pdos = ; + op-sink-microwatt = <1000000>; + extcon-cables = <1 2 5 6 9 10 12 44>; ++ typec-altmodes = <0xff01 1 0x001c0000 1>; + }; + }; + +-- +2.25.4 + + +From 49c9b8be922710468ae0227afca5435dd960d607 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 30 Nov 2019 14:42:00 +0100 +Subject: [PATCH 49/98] usb/typec: tcpm: Set extcon cable states to false on + partner disconnect + +--- + drivers/usb/typec/tcpm/tcpm.c | 17 +++++++++++------ + 1 file changed, 11 insertions(+), 6 deletions(-) + +diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c +index 79955a6e8af5..e92465784596 100644 +--- a/drivers/usb/typec/tcpm/tcpm.c ++++ b/drivers/usb/typec/tcpm/tcpm.c +@@ -625,13 +625,17 @@ static void tcpm_update_extcon_data(struct tcpm_port *port, bool attached) { + extcon_set_state(port->extcon, EXTCON_USB, true); + extcon_set_state(port->extcon, EXTCON_USB_HOST, attached); + } +- while(*capability != EXTCON_NONE) { ++ while (*capability != EXTCON_NONE) { + union extcon_property_value val; +- val.intval = true; +- extcon_set_property(port->extcon, *capability, EXTCON_PROP_USB_SS, val); +- val.intval = (port->polarity == TYPEC_POLARITY_CC2); +- extcon_set_property(port->extcon, *capability, +- EXTCON_PROP_USB_TYPEC_POLARITY, val); ++ if (attached) { ++ val.intval = true; ++ extcon_set_property(port->extcon, *capability, EXTCON_PROP_USB_SS, val); ++ val.intval = (port->polarity == TYPEC_POLARITY_CC2); ++ extcon_set_property(port->extcon, *capability, ++ EXTCON_PROP_USB_TYPEC_POLARITY, val); ++ } else { ++ extcon_set_state(port->extcon, *capability, false); ++ } + extcon_sync(port->extcon, *capability); + capability++; + } +@@ -2715,6 +2719,7 @@ static int tcpm_src_attach(struct tcpm_port *port) + static void tcpm_typec_disconnect(struct tcpm_port *port) + { + if (port->connected) { ++ tcpm_update_extcon_data(port, false); + typec_unregister_partner(port->partner); + port->partner = NULL; + port->connected = false; +-- +2.25.4 + + +From 4ec67130b741a1a4cd6fbd145e981076cc1cb176 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 30 Nov 2019 14:44:18 +0100 +Subject: [PATCH 50/98] arm64/configs: Enable DP altmode in + pinebook_pro_defconfig + +--- + arch/arm64/configs/pinebook_pro_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index d56543fc1223..7647a2d6ac63 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -2238,6 +2238,7 @@ CONFIG_TYPEC=y + CONFIG_TYPEC_TCPM=y + CONFIG_TYPEC_TCPCI=y + CONFIG_TYPEC_FUSB302=y ++CONFIG_TYPEC_DP_ALTMODE=y + CONFIG_MMC=y + CONFIG_PWRSEQ_SD8787=m + CONFIG_MMC_BLOCK_MINORS=32 +-- +2.25.4 + + +From 0da12bfcaa0b2209faeeb3be8b06beb8062a2d47 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 30 Nov 2019 14:59:28 +0100 +Subject: [PATCH 51/98] usb/typec: tcpm: Don't set EXTCON_PROP_USB_SS + +--- + drivers/usb/typec/tcpm/tcpm.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c +index e92465784596..97d70d72385a 100644 +--- a/drivers/usb/typec/tcpm/tcpm.c ++++ b/drivers/usb/typec/tcpm/tcpm.c +@@ -626,10 +626,8 @@ static void tcpm_update_extcon_data(struct tcpm_port *port, bool attached) { + extcon_set_state(port->extcon, EXTCON_USB_HOST, attached); + } + while (*capability != EXTCON_NONE) { +- union extcon_property_value val; + if (attached) { +- val.intval = true; +- extcon_set_property(port->extcon, *capability, EXTCON_PROP_USB_SS, val); ++ union extcon_property_value val; + val.intval = (port->polarity == TYPEC_POLARITY_CC2); + extcon_set_property(port->extcon, *capability, + EXTCON_PROP_USB_TYPEC_POLARITY, val); +-- +2.25.4 + + +From b777f62b1cb717f4c194760734b527fbf3f9a560 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sat, 30 Nov 2019 15:00:29 +0100 +Subject: [PATCH 52/98] phy/rockchip: rockchip_typec_phy: Set + EXTCON_PROP_USB_SS on extcon + +Set EXTCON_PROP_USB_SS for states EXTCON_USB, EXTCON_USB_HOST and EXTCON_DISP_DP +--- + drivers/phy/rockchip/phy-rockchip-typec.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c +index be0ce0c113c0..10551719ee1b 100644 +--- a/drivers/phy/rockchip/phy-rockchip-typec.c ++++ b/drivers/phy/rockchip/phy-rockchip-typec.c +@@ -1162,6 +1162,7 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev) + return PTR_ERR(tcphy->extcon); + } + } else { ++ union extcon_property_value extcon_true = { .intval = true }; + extcon_set_property_capability(tcphy->extcon, EXTCON_USB, + EXTCON_PROP_USB_SS); + extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST, +@@ -1174,6 +1175,15 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev) + EXTCON_PROP_USB_TYPEC_POLARITY); + extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP, + EXTCON_PROP_USB_TYPEC_POLARITY); ++ extcon_set_property(tcphy->extcon, EXTCON_USB, EXTCON_PROP_USB_SS, ++ extcon_true); ++ extcon_set_property(tcphy->extcon, EXTCON_USB_HOST, EXTCON_PROP_USB_SS, ++ extcon_true); ++ extcon_set_property(tcphy->extcon, EXTCON_DISP_DP, EXTCON_PROP_USB_SS, ++ extcon_true); ++ extcon_sync(tcphy->extcon, EXTCON_USB); ++ extcon_sync(tcphy->extcon, EXTCON_USB_HOST); ++ extcon_sync(tcphy->extcon, EXTCON_DISP_DP); + } + + pm_runtime_enable(dev); +-- +2.25.4 + + +From 9a007ab80600c7536a406fdae1cdcde8960137cf Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 3 Dec 2019 15:52:18 +0100 +Subject: [PATCH 53/98] phy/rockchip: rockchip_typec_phy: Remove setting of + EXTCON_PROP_USB_SS property + +--- + drivers/phy/rockchip/phy-rockchip-typec.c | 7 ------- + 1 file changed, 7 deletions(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c +index 10551719ee1b..f5b497b4b97e 100644 +--- a/drivers/phy/rockchip/phy-rockchip-typec.c ++++ b/drivers/phy/rockchip/phy-rockchip-typec.c +@@ -1162,7 +1162,6 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev) + return PTR_ERR(tcphy->extcon); + } + } else { +- union extcon_property_value extcon_true = { .intval = true }; + extcon_set_property_capability(tcphy->extcon, EXTCON_USB, + EXTCON_PROP_USB_SS); + extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST, +@@ -1175,12 +1174,6 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev) + EXTCON_PROP_USB_TYPEC_POLARITY); + extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP, + EXTCON_PROP_USB_TYPEC_POLARITY); +- extcon_set_property(tcphy->extcon, EXTCON_USB, EXTCON_PROP_USB_SS, +- extcon_true); +- extcon_set_property(tcphy->extcon, EXTCON_USB_HOST, EXTCON_PROP_USB_SS, +- extcon_true); +- extcon_set_property(tcphy->extcon, EXTCON_DISP_DP, EXTCON_PROP_USB_SS, +- extcon_true); + extcon_sync(tcphy->extcon, EXTCON_USB); + extcon_sync(tcphy->extcon, EXTCON_USB_HOST); + extcon_sync(tcphy->extcon, EXTCON_DISP_DP); +-- +2.25.4 + + +From 7152b70e675906d47ff393ece1105c417d00208f Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 3 Dec 2019 15:53:52 +0100 +Subject: [PATCH 54/98] usb/typec: altmodes: typec_displayport: Add extcon USB + SS property setting + +Set property EXTCON_PROP_USB_SS on extcon device when typec port is in +multi function mode +--- + drivers/usb/typec/altmodes/displayport.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/typec/altmodes/displayport.c b/drivers/usb/typec/altmodes/displayport.c +index bae1cbc7f101..20d5a935e1fa 100644 +--- a/drivers/usb/typec/altmodes/displayport.c ++++ b/drivers/usb/typec/altmodes/displayport.c +@@ -155,12 +155,16 @@ static void dp_altmode_update_extcon(struct dp_altmode *dp, bool disconnect) { + if (disconnect || !dp->data.conf) { + extcon_set_state_sync(edev, EXTCON_DISP_DP, false); + } else { +- extcon_set_state_sync(edev, EXTCON_DISP_DP, true); ++ union extcon_property_value extcon_true = { .intval = true }; ++ extcon_set_state(edev, EXTCON_DISP_DP, true); + if (DP_CONF_GET_PIN_ASSIGN(dp->data.conf) & DP_PIN_ASSIGN_MULTI_FUNC_MASK) { + extcon_set_state_sync(edev, EXTCON_USB_HOST, true); ++ extcon_set_property(edev, EXTCON_DISP_DP, EXTCON_PROP_USB_SS, ++ extcon_true); + } else { + extcon_set_state_sync(edev, EXTCON_USB_HOST, false); + } ++ extcon_sync(edev, EXTCON_DISP_DP); + extcon_set_state_sync(edev, EXTCON_USB, false); + } + +-- +2.25.4 + + +From b6922b7fb93597cd4df897a11f7a398dd7baa892 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 3 Dec 2019 16:24:04 +0100 +Subject: [PATCH 55/98] arm64/configs: pinebook_pro_defconfig: Enable devfreq + governor "performance" + +Setting the gpu devfreq governor to "performance" improves graphics performance +on the Pinebook Pro drastically. Especially blitting performance is increased by +an insane amount. +--- + arch/arm64/configs/pinebook_pro_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index 7647a2d6ac63..677bd12780cc 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -2461,6 +2461,7 @@ CONFIG_REMOTEPROC=y + CONFIG_RPMSG_CHAR=y + CONFIG_RPMSG_QCOM_GLINK_RPM=y + CONFIG_ROCKCHIP_PM_DOMAINS=y ++CONFIG_DEVFREQ_GOV_PERFORMANCE=y + CONFIG_ARM_RK3399_DMC_DEVFREQ=y + CONFIG_EXTCON_ADC_JACK=m + CONFIG_EXTCON_GPIO=y +-- +2.25.4 + + +From f51fbbfe7a6210f8892f2dfd50eec51dfcc56f28 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 6 Dec 2019 13:50:27 +0100 +Subject: [PATCH 56/98] arm64/config: Enable arm32 compat and kexec file on + Pinebook Pro + +--- + arch/arm64/configs/pinebook_pro_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index 677bd12780cc..7deda47f7111 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -49,6 +49,8 @@ CONFIG_NR_CPUS=8 + CONFIG_HZ_100=y + CONFIG_SECCOMP=y + CONFIG_PARAVIRT_TIME_ACCOUNTING=y ++CONFIG_KEXEC_FILE=y ++CONFIG_COMPAT=y + # CONFIG_ARM64_LSE_ATOMICS is not set + CONFIG_ARM64_ACPI_PARKING_PROTOCOL=y + CONFIG_CMDLINE="console=ttyAMA0" +-- +2.25.4 + + +From a54f2e8c4315478092af0cf444258c2d8eaa874c Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 11 Dec 2019 12:20:24 +0100 +Subject: [PATCH 57/98] power: supply: cw2015: add SPDX license identifier + +--- + drivers/power/supply/cw2015_battery.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 3703ba3b96d0..584d0b612b4b 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0 + /* + * Fuel gauge driver for CellWise 2013 / 2015 + * +@@ -7,10 +8,6 @@ + * Authors: xuhuicong + * Authors: Tobias Schramm + * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- * + */ + + #include +-- +2.25.4 + + +From dc0fd588b331dcca32c042405601d5a872fbeb8e Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 11 Dec 2019 12:21:41 +0100 +Subject: [PATCH 58/98] power: supply: cw2015: remove wrong of table + +--- + drivers/power/supply/cw2015_battery.c | 8 -------- + 1 file changed, 8 deletions(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index 584d0b612b4b..c06301efffce 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -913,14 +913,6 @@ static const struct of_device_id cw2015_of_match[] = { + }; + MODULE_DEVICE_TABLE(of, cw2015_of_match); + +-static const struct of_device_id max17040_of_match[] = { +- { .compatible = "maxim,max17040" }, +- { .compatible = "maxim,max77836-battery" }, +- { }, +-}; +- +-MODULE_DEVICE_TABLE(of, max17040_of_match); +- + static struct i2c_driver cw_bat_driver = { + .driver = { + .name = PREFIX"cw201x", +-- +2.25.4 + + +From e1fd61ecd8ee71251d5a78148a0333a9b1a0c7c4 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 11 Dec 2019 12:44:07 +0100 +Subject: [PATCH 59/98] power: supply: cw2015: Perform style fixup + +--- + drivers/power/supply/cw2015_battery.c | 98 ++++++++++++++++----------- + 1 file changed, 58 insertions(+), 40 deletions(-) + +diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c +index c06301efffce..b9da76850991 100644 +--- a/drivers/power/supply/cw2015_battery.c ++++ b/drivers/power/supply/cw2015_battery.c +@@ -140,8 +140,8 @@ static int cw_init(struct cw_battery *cw_bat) + + if ((reg_val & CW2015_MASK_ATHD) != CW2015_ATHD(cw_bat->alert_level)) { + dev_info(&cw_bat->client->dev, "the new CW2015_ATHD have not set\n"); +- reg_val &= ~CW2015_MASK_ATHD; /* clear CW2015_ATHD */ +- reg_val |= ~CW2015_ATHD(cw_bat->alert_level); /* set CW2015_ATHD */ ++ reg_val &= ~CW2015_MASK_ATHD; ++ reg_val |= ~CW2015_ATHD(cw_bat->alert_level); + ret = cw_write(cw_bat->client, CW2015_REG_CONFIG, ®_val); + if (ret < 0) + return ret; +@@ -199,27 +199,31 @@ static int cw_init(struct cw_battery *cw_bat) + return 0; + } + +-static int check_charger_online(struct device *dev, void *data) { ++static int check_charger_online(struct device *dev, void *data) ++{ + struct device *cw_dev = data; + struct power_supply *supply = dev_get_drvdata(dev); + union power_supply_propval val; + + if (supply->desc->type == POWER_SUPPLY_TYPE_BATTERY) { +- dev_dbg(cw_dev, "Skipping power supply %s since it is a battery\n", dev_name(dev)); ++ dev_dbg(cw_dev, "Skipping power supply %s since it is a battery\n", ++ dev_name(dev)); + return 0; // Bail out, not a charger + } +- if(!supply->desc->get_property(supply, POWER_SUPPLY_PROP_ONLINE, &val)) { ++ if (!supply->desc->get_property(supply, POWER_SUPPLY_PROP_ONLINE, ++ &val)) { + return val.intval; +- } else { +- dev_dbg(cw_dev, "Skipping power supply %s since it does not have an online property\n", dev_name(dev)); + } ++ dev_dbg(cw_dev, "Skipping power supply %s since it does not " ++ "have an online property\n", dev_name(dev)); + return 0; + } + + #ifdef CONFIG_OF +-static int device_parent_match_of_node(struct device *dev, const void *np) { +- while(dev) { +- if(dev->of_node == np) { ++static int device_parent_match_of_node(struct device *dev, const void *np) ++{ ++ while (dev) { ++ if (dev->of_node == np) { + return 1; + } + dev = dev->parent; +@@ -232,33 +236,42 @@ static int get_charge_state(struct cw_battery *cw_bat) + { + #ifdef CONFIG_OF + int i = 0, online = 0; +- struct device_node* supply_of; ++ struct device_node *supply_of; + struct device *cw_dev = &cw_bat->client->dev; ++ + if (!cw_dev->of_node) { +- dev_dbg(cw_dev, "Charger does not have an of node, scanning all supplies\n"); ++ dev_dbg(cw_dev, "Charger does not have an of node, scanning " ++ "all supplies\n"); + #endif +- return !!class_for_each_device(power_supply_class, NULL, cw_dev, check_charger_online); ++ return !!class_for_each_device(power_supply_class, NULL, ++ cw_dev, check_charger_online); + #ifdef CONFIG_OF + } + do { + struct device *supply_dev; +- dev_dbg(cw_dev, "Scanning linked supplies of %s\n", cw_dev->of_node->name); +- supply_of = of_parse_phandle(cw_dev->of_node, "power-supplies", i++); ++ ++ dev_dbg(cw_dev, "Scanning linked supplies of %s\n", ++ cw_dev->of_node->name); ++ supply_of = of_parse_phandle(cw_dev->of_node, "power-supplies", ++ i++); + if (!supply_of) { + dev_dbg(cw_dev, "Got empty of node, scan done\n"); + break; + } + dev_dbg(cw_dev, "Got power supply %s\n", supply_of->name); +- supply_dev = class_find_device(power_supply_class, NULL, supply_of, device_parent_match_of_node); ++ supply_dev = class_find_device(power_supply_class, NULL, ++ supply_of, ++ device_parent_match_of_node); + if (supply_dev) { + online = check_charger_online(supply_dev, NULL); + dev_dbg(supply_dev, "Charger online: %d\n", online); + put_device(supply_dev); + } else { +- dev_warn(cw_dev, "Failed to get device for device node %s\n", supply_of->name); ++ dev_warn(cw_dev, "Failed to get device for device " ++ "node %s\n", supply_of->name); + } + of_node_put(supply_of); +- } while(!online); ++ } while (!online); + return online; + #endif + } +@@ -311,9 +324,8 @@ static int cw_get_capacity(struct cw_battery *cw_bat) + reset_loop = 0; + } + return cw_bat->capacity; +- } else { +- reset_loop = 0; + } ++ reset_loop = 0; + + /* case 1 : aviod swing */ + if (((cw_bat->charger_mode > 0) && +@@ -357,17 +369,16 @@ static int cw_get_capacity(struct cw_battery *cw_bat) + + if (cw_capacity >= cw_bat->capacity - sleep_cap) { + return cw_capacity; +- } else { +- if (!sleep_cap) +- discharging_loop = discharging_loop + +- 1 + cw_bat->after.tv_sec / +- (cw_bat->monitor_sec / 1000); +- else +- discharging_loop = 0; +- cw_printk("discharging_loop = %d\n", +- discharging_loop); +- return cw_bat->capacity - sleep_cap; + } ++ if (!sleep_cap) ++ discharging_loop = discharging_loop + ++ 1 + cw_bat->after.tv_sec / ++ (cw_bat->monitor_sec / 1000); ++ else ++ discharging_loop = 0; ++ cw_printk("discharging_loop = %d\n", ++ discharging_loop); ++ return cw_bat->capacity - sleep_cap; + } + #endif + discharging_loop++; +@@ -594,7 +605,8 @@ static void cw_bat_work(struct work_struct *work) + + static bool cw_battery_valid_time_to_empty(struct cw_battery *cw_bat) + { +- return cw_bat->time_to_empty > 0 && cw_bat->time_to_empty < CW2015_MASK_SOC && ++ return cw_bat->time_to_empty > 0 && ++ cw_bat->time_to_empty < CW2015_MASK_SOC && + cw_bat->status == POWER_SUPPLY_STATUS_DISCHARGING; + } + +@@ -743,23 +755,29 @@ static int cw2015_parse_dt(struct cw_battery *cw_bat) + } + + cw_bat->bat_mode = MODE_BATTERY; +- cw_bat->monitor_sec = CW2015_DEFAULT_MONITOR_SEC * CW2015_TIMER_MS_COUNTS; ++ cw_bat->monitor_sec = CW2015_DEFAULT_MONITOR_SEC * ++ CW2015_TIMER_MS_COUNTS; + + prop = of_find_property(node, PREFIX"voltage-divider", &length); + if (prop) { + length /= sizeof(u32); + if (length != 2) { +- dev_err(dev, "Length of voltage divider array must be 2, not %u\n", length); ++ dev_err(dev, "Length of voltage divider array must be " ++ "2, not %u\n", length); + return -EINVAL; + } +- ret = of_property_read_u32_index(node, PREFIX"voltage-divider", 0, &data->divider_high); ++ ret = of_property_read_u32_index(node, PREFIX"voltage-divider", ++ 0, &data->divider_high); + if (ret) { +- dev_err(dev, "Failed to read value of high side voltage divider resistor: %d\n", ret); ++ dev_err(dev, "Failed to read value of high side " ++ "voltage divider resistor: %d\n", ret); + return ret; + } +- ret = of_property_read_u32_index(node, PREFIX"voltage-divider", 1, &data->divider_low); ++ ret = of_property_read_u32_index(node, PREFIX"voltage-divider", ++ 1, &data->divider_low); + if (ret) { +- dev_err(dev, "Failed to read value of low side voltage divider resistor: %d\n", ret); ++ dev_err(dev, "Failed to read value of low side " ++ "voltage divider resistor: %d\n", ret); + return ret; + } + } +@@ -812,8 +830,6 @@ static int cw_bat_probe(struct i2c_client *client, + + cw_bat = devm_kzalloc(&client->dev, sizeof(*cw_bat), GFP_KERNEL); + if (!cw_bat) { +- dev_err(&client->dev, +- "fail to allocate memory for cw2015\n"); + return -ENOMEM; + } + +@@ -856,7 +872,7 @@ static int cw_bat_probe(struct i2c_client *client, + &cw_bat->battery_delay_work, msecs_to_jiffies(10)); + + dev_info(&cw_bat->client->dev, +- "cw2015/cw2013 driver v1.2 probe sucess\n"); ++ "cw2015/cw2013 driver probe success\n"); + return 0; + } + +@@ -865,6 +881,7 @@ static int cw_bat_suspend(struct device *dev) + { + struct i2c_client *client = to_i2c_client(dev); + struct cw_battery *cw_bat = i2c_get_clientdata(client); ++ + ktime_get_boottime_ts64(&cw_bat->suspend_time_before); + cancel_delayed_work(&cw_bat->battery_delay_work); + return 0; +@@ -874,6 +891,7 @@ static int cw_bat_resume(struct device *dev) + { + struct i2c_client *client = to_i2c_client(dev); + struct cw_battery *cw_bat = i2c_get_clientdata(client); ++ + cw_bat->suspend_resume_mark = 1; + ktime_get_boottime_ts64(&cw_bat->after); + cw_bat->after = timespec64_sub(cw_bat->after, +-- +2.25.4 + + +From d0457a9ec42c71da353aeb0783bc2561aa01ffc0 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Mon, 16 Dec 2019 17:43:35 +0100 +Subject: [PATCH 60/98] Enable KEXEC system call, too + +--- + arch/arm64/configs/pinebook_pro_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index 7deda47f7111..f8175ed36eaa 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -49,6 +49,7 @@ CONFIG_NR_CPUS=8 + CONFIG_HZ_100=y + CONFIG_SECCOMP=y + CONFIG_PARAVIRT_TIME_ACCOUNTING=y ++CONFIG_KEXEC=y + CONFIG_KEXEC_FILE=y + CONFIG_COMPAT=y + # CONFIG_ARM64_LSE_ATOMICS is not set +-- +2.25.4 + + +From 98dd8f4eda91249e4a1fe25e4855b24c3be59af5 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Mon, 16 Dec 2019 17:51:11 +0100 +Subject: [PATCH 61/98] arm64: configs: Use schedutil as default cpu frequency + scaling governor + +--- + arch/arm64/configs/pinebook_pro_defconfig | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index f8175ed36eaa..d99cd8e81576 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -62,11 +62,11 @@ CONFIG_CPU_IDLE_GOV_LADDER=y + CONFIG_ARM_CPUIDLE=y + CONFIG_CPU_FREQ=y + CONFIG_CPU_FREQ_STAT=y +-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y + CONFIG_CPU_FREQ_GOV_POWERSAVE=y + CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y + CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +-CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + CONFIG_CPUFREQ_DT=y + CONFIG_ACPI_CPPC_CPUFREQ=y + CONFIG_ARM_SCPI_CPUFREQ=y +-- +2.25.4 + + +From 513295eb61b4fdd35df29fb29ecd38f78be99237 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 18 Dec 2019 05:58:03 +0100 +Subject: [PATCH 62/98] arm64: dts: Fix vcc5v0_host_en GPIO on Pinebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 3a5121c458c2..77962735af5e 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -291,7 +291,7 @@ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; +- gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; ++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; +@@ -862,7 +862,7 @@ + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { +- rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + +-- +2.25.4 + + +From e7a06bb065c2a1f7a6953f353d979fd81d1e3119 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 18 Dec 2019 05:58:53 +0100 +Subject: [PATCH 63/98] arm64: dts: Remove rt6540 pinctrl on Pinebook Pro + +THere is nor rt5640 codec on the PBP +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 6 ------ + 1 file changed, 6 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 77962735af5e..a51f64b1c3d8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -854,12 +854,6 @@ + }; + }; + +- rt5640 { +- rt5640_hpcon: rt5640-hpcon { +- rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; +-- +2.25.4 + + +From 4d9095b1ecec77e1ef89259bf146e70c6cc51532 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 18 Dec 2019 06:00:24 +0100 +Subject: [PATCH 64/98] arm64: dts: Add low battery output of cw2015 as power + key + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index a51f64b1c3d8..5620bed5a504 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -93,7 +93,7 @@ + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; +- pinctrl-0 = <&pwrbtn &lidbtn>; ++ pinctrl-0 = <&pwrbtn &lidbtn &lowbat>; + + power { + debounce-interval = <20>; +@@ -111,8 +111,14 @@ + linux,input-type = ; + wakeup-source; + }; ++ ++ low-battery { ++ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>; ++ label = "Low Battery"; ++ linux,code = ; ++ }; + }; +- ++ + backlight: edp-backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 740740 0>; +@@ -725,6 +731,7 @@ + cellwise,monitor-interval = <5>; + cellwise,virtual-power = <0>; + cellwise,design-capacity = <9800>; ++ cellwise,alert-level = <3>; + power-supplies = <&mains_charger>, <&fusb0>; + }; + }; +@@ -792,6 +799,9 @@ + lidbtn: lidbtn { + rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; + }; ++ lowbat: lowbat { ++ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; + }; + + dc-charger { +-- +2.25.4 + + +From 46870cd47007c4c6cea74b3d93b9a5f2298da8a2 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 18 Dec 2019 18:14:24 +0100 +Subject: [PATCH 65/98] arm64: dts: Tie pmic to correct irq on Pinebook Pro + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 5620bed5a504..463e9a4f2444 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -441,8 +441,8 @@ + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; +- interrupt-parent = <&gpio1>; +- interrupts = <21 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-parent = <&gpio3>; ++ interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; +-- +2.25.4 + + +From 93069b4054721eee0fc957d9eb91ac7dcbd2e8b0 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 18 Dec 2019 18:43:20 +0100 +Subject: [PATCH 66/98] arm64: configs: Enable IRQ debugging in + pinebook_pro_defconfig + +--- + arch/arm64/configs/pinebook_pro_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index d99cd8e81576..b927ec2370b3 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -2,6 +2,7 @@ CONFIG_LOCALVERSION="-MANJARO-ARM" + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SYSVIPC=y + CONFIG_POSIX_MQUEUE=y ++CONFIG_GENERIC_IRQ_DEBUGFS=y + CONFIG_NO_HZ=y + CONFIG_HIGH_RES_TIMERS=y + CONFIG_PREEMPT_VOLUNTARY=y +-- +2.25.4 + + +From e3c8994acdc367225e868d5bb4922c1ac5bf450d Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 18 Dec 2019 19:10:13 +0100 +Subject: [PATCH 67/98] arm64: configs: Make rk808 rtc a builtin + +Fixes hctosys clock setup +--- + arch/arm64/configs/pinebook_pro_defconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index b927ec2370b3..37f1132751f5 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -2318,7 +2318,7 @@ CONFIG_RTC_DRV_DS1374=m + CONFIG_RTC_DRV_DS1374_WDT=y + CONFIG_RTC_DRV_DS1672=m + CONFIG_RTC_DRV_MAX6900=m +-CONFIG_RTC_DRV_RK808=m ++CONFIG_RTC_DRV_RK808=y + CONFIG_RTC_DRV_RS5C372=m + CONFIG_RTC_DRV_ISL1208=m + CONFIG_RTC_DRV_ISL12022=m +-- +2.25.4 + + +From cb73162a7ed25d5bf41ce6ab896b6412fd37e950 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 20 Dec 2019 04:37:19 +0100 +Subject: [PATCH 68/98] Revert "arm64: dts: Add low battery output of cw2015 as + power key" + +This reverts commit e81a379aa96359d889daaf25da777f9eaa85a875. +Seems conversion of battery percentage to alert level is not correct. Don't use the cw2015 +as a power key for now +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 14 ++------------ + 1 file changed, 2 insertions(+), 12 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 463e9a4f2444..c33abe9d85fa 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -93,7 +93,7 @@ + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; +- pinctrl-0 = <&pwrbtn &lidbtn &lowbat>; ++ pinctrl-0 = <&pwrbtn &lidbtn>; + + power { + debounce-interval = <20>; +@@ -111,14 +111,8 @@ + linux,input-type = ; + wakeup-source; + }; +- +- low-battery { +- gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>; +- label = "Low Battery"; +- linux,code = ; +- }; + }; +- ++ + backlight: edp-backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 740740 0>; +@@ -731,7 +725,6 @@ + cellwise,monitor-interval = <5>; + cellwise,virtual-power = <0>; + cellwise,design-capacity = <9800>; +- cellwise,alert-level = <3>; + power-supplies = <&mains_charger>, <&fusb0>; + }; + }; +@@ -799,9 +792,6 @@ + lidbtn: lidbtn { + rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; + }; +- lowbat: lowbat { +- rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; +- }; + }; + + dc-charger { +-- +2.25.4 + + +From dd94b43f752f4c5bfb246351d2897efc3532c30c Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Mon, 23 Dec 2019 17:53:53 +0100 +Subject: [PATCH 69/98] arm64: configs: Update pinebook_pro_defconfig to Linux + 5.5-rc3 + +--- + arch/arm64/configs/pinebook_pro_defconfig | 17 ++++++++--------- + 1 file changed, 8 insertions(+), 9 deletions(-) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index 37f1132751f5..884f07fcc590 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -9,8 +9,6 @@ CONFIG_PREEMPT_VOLUNTARY=y + CONFIG_IRQ_TIME_ACCOUNTING=y + CONFIG_BSD_PROCESS_ACCT=y + CONFIG_BSD_PROCESS_ACCT_V3=y +-CONFIG_TASKSTATS=y +-CONFIG_TASK_DELAY_ACCT=y + CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=y +@@ -59,6 +57,7 @@ CONFIG_CMDLINE="console=ttyAMA0" + CONFIG_HIBERNATION=y + CONFIG_PM_DEBUG=y + CONFIG_PM_TEST_SUSPEND=y ++CONFIG_ENERGY_MODEL=y + CONFIG_CPU_IDLE_GOV_LADDER=y + CONFIG_ARM_CPUIDLE=y + CONFIG_CPU_FREQ=y +@@ -920,7 +919,6 @@ CONFIG_HIX5HD2_GMAC=m + CONFIG_HIP04_ETH=m + CONFIG_HNS_DSAF=m + CONFIG_HNS_ENET=m +-# CONFIG_NET_VENDOR_HP is not set + # CONFIG_NET_VENDOR_I825XX is not set + CONFIG_E100=m + CONFIG_E1000=m +@@ -985,7 +983,6 @@ CONFIG_PHYLIB=y + CONFIG_LED_TRIGGER_PHY=y + CONFIG_SFP=m + CONFIG_AMD_PHY=m +-CONFIG_AT803X_PHY=m + CONFIG_BCM87XX_PHY=m + CONFIG_BROADCOM_PHY=m + CONFIG_CICADA_PHY=m +@@ -998,6 +995,7 @@ CONFIG_LXT_PHY=m + CONFIG_MARVELL_10G_PHY=m + CONFIG_MICREL_PHY=m + CONFIG_NATIONAL_PHY=m ++CONFIG_AT803X_PHY=m + CONFIG_QSEMI_PHY=m + CONFIG_ROCKCHIP_PHY=y + CONFIG_STE10XP=m +@@ -1550,7 +1548,9 @@ CONFIG_REGULATOR_RK808=y + CONFIG_REGULATOR_S2MPS11=y + CONFIG_REGULATOR_VCTRL=y + CONFIG_REGULATOR_VEXPRESS=y ++CONFIG_RC_CORE=y + CONFIG_LIRC=y ++CONFIG_BPF_LIRC_MODE2=y + CONFIG_RC_DECODERS=y + CONFIG_IR_NEC_DECODER=m + CONFIG_IR_RC5_DECODER=m +@@ -1581,11 +1581,10 @@ CONFIG_IR_IGUANA=m + CONFIG_IR_TTUSBIR=m + CONFIG_RC_LOOPBACK=m + CONFIG_IR_GPIO_CIR=m +-CONFIG_IR_GPIO_TX=m +-CONFIG_IR_PWM_TX=m + CONFIG_IR_SERIAL=m + CONFIG_IR_SERIAL_TRANSMITTER=y + CONFIG_IR_SIR=m ++CONFIG_RC_XBOX_DVD=m + CONFIG_MEDIA_SUPPORT=y + CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +@@ -2436,6 +2435,7 @@ CONFIG_USB_HWA_HCD=m + CONFIG_UWB=m + CONFIG_UWB_WHCI=m + CONFIG_UWB_I1480U=m ++# CONFIG_NET_VENDOR_HP is not set + CONFIG_MFD_CROS_EC=y + CONFIG_CHROMEOS_TBMC=m + CONFIG_CROS_EC_I2C=y +@@ -2935,7 +2935,6 @@ CONFIG_CRYPTO_USER=m + # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set + CONFIG_CRYPTO_PCRYPT=m + CONFIG_CRYPTO_DH=m +-CONFIG_CRYPTO_CHACHA20POLY1305=m + CONFIG_CRYPTO_AEGIS128=m + CONFIG_CRYPTO_CFB=m + CONFIG_CRYPTO_LRW=m +@@ -2995,6 +2994,8 @@ CONFIG_FRAME_WARN=1024 + CONFIG_STRIP_ASM_SYMS=y + CONFIG_DEBUG_SECTION_MISMATCH=y + CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x0 ++CONFIG_KGDB=y ++CONFIG_KGDB_TESTS=y + CONFIG_DEBUG_VM=y + CONFIG_SOFTLOCKUP_DETECTOR=y + CONFIG_SCHEDSTATS=y +@@ -3005,5 +3006,3 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=60 + # CONFIG_RCU_TRACE is not set + # CONFIG_FTRACE is not set + # CONFIG_RUNTIME_TESTING_MENU is not set +-CONFIG_KGDB=y +-CONFIG_KGDB_TESTS=y +-- +2.25.4 + + +From 114f10f1b194b00722e5524c2ba6b457bc13e594 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 2 Jan 2020 09:13:30 +0100 +Subject: [PATCH 70/98] arm64/dts: Add vcc5v0_usb regulator to Pinebook Pro dts + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 25 ++++++++++++++++++- + 1 file changed, 24 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index c33abe9d85fa..a39e5547e14b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -287,6 +287,21 @@ + vin-supply = <&vcc_sys>; + }; + ++ vcc5v0_usb: vcc5v0-usb-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwr_5v>; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; +@@ -296,7 +311,11 @@ + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { +@@ -855,6 +874,10 @@ + }; + + usb2 { ++ pwr_5v: pwr-5v { ++ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; +-- +2.25.4 + + +From f81d56643f4390b7bb23c1642fc9fb2a7c8c5c97 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 2 Jan 2020 13:25:40 +0100 +Subject: [PATCH 71/98] arm64/dts: Rewrite regulator section to match PBP + schematic + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 267 +++++++++++------- + 1 file changed, 158 insertions(+), 109 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index a39e5547e14b..e88cd951e1fb 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -19,9 +19,9 @@ + edp_panel: edp-panel { /* "boe,nv140fhmn49" */ + compatible = "boe,nv140fhmn49", "simple-panel"; + backlight = <&backlight>; +- power-supply = <&vcc3v3_s0>; +-// pinctrl-names = "default"; +-// pinctrl-0 = <&panel_en>; ++ power-supply = <&vcc3v3_panel>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&panel_en>; + enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + prepare-delay-ms = <20>; + enable-delay-ms = <20>; +@@ -80,15 +80,6 @@ + }; + }; + +- dc_12v: dc-12v { +- compatible = "regulator-fixed"; +- regulator-name = "dc_12v"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <12000000>; +- regulator-max-microvolt = <12000000>; +- }; +- + gpio-keys { + compatible = "gpio-keys"; + autorepeat; +@@ -116,7 +107,7 @@ + backlight: edp-backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 740740 0>; +- power-supply = <&vcc3v3_s3>; ++ power-supply = <&vcc_12v>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 +@@ -154,32 +145,6 @@ + status = "okay"; + }; + +- panel { +- vcc_lcd_en_drv: vcc-lcd-en-drv { +- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- panel_en: panel-en { +- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- +- vcc_lcd_en: vcc-lcd-en-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; +-// pinctrl-names = "default"; +-// pinctrl-0 = <&vcc_lcd_en_drv>; +- regulator-name = "vcc_lcd_en"; +- regulator-enable-ramp-delay = <100000>; +- vin-supply = <&vcc3v3_sys>; +- regulator-always-on; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; +@@ -243,40 +208,35 @@ + status = "okay"; + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; +- VCC-supply = <&vcc5v0_host>; ++ vcc-supply = <&vcc5v0_usb>; + sound-name-prefix = "Speaker Amplifier"; + }; + +- /* switched by pmic_sleep */ +- vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { ++ /* Root power source */ ++ vcc_sysin: vcc-sysin { + compatible = "regulator-fixed"; +- regulator-name = "vcc1v8_s3"; ++ regulator-name = "vcc_sysin"; + regulator-always-on; + regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- vin-supply = <&vcc_1v8>; +- }; +- +- vcc3v3_pcie: vcc3v3-pcie-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pcie_pwr_en>; +- regulator-name = "vcc3v3_pcie"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&dc_12v>; + }; + +- vcc_phy: vcc-phy-regulator { ++ /* Regulators supplied by vcc_sysin */ ++ /* LCD backlight supply */ ++ vcc_12v: vcc-12v { + compatible = "regulator-fixed"; +- regulator-name = "vcc_phy"; ++ regulator-name = "vcc_12v"; + regulator-always-on; + regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; + }; + ++ /* Main 3.3 V supply */ + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; +@@ -284,9 +244,14 @@ + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; + }; + ++ /* 5 V USB power supply */ + vcc5v0_usb: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -295,58 +260,131 @@ + pinctrl-0 = <&pwr_5v>; + regulator-name = "vcc5v0_usb"; + regulator-always-on; +- vin-supply = <&vcc_sys>; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sysin>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + +- /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ +- vcc5v0_host: vcc5v0-host-regulator { ++ /* RK3399 logic supply */ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc3v3_sys */ ++ /* 0.9 V supply, always on */ ++ vcc_0v9: vcc-0v9 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_0v9"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* S3 1.8 V supply, switched by vcc1v8_s3 */ ++ vcca1v8_s3: vcc1v8-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcca1v8_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* micro SD card power */ ++ vcc3v0_sd: vcc3v0-sd { + compatible = "regulator-fixed"; + enable-active-high; +- gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; ++ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&vcc5v0_host_en>; +- regulator-name = "vcc5v0_host"; ++ pinctrl-0 = <&sdmmc0_pwr_h>; ++ regulator-name = "vcc3v0_sd"; + regulator-always-on; +- vin-supply = <&vcc5v0_usb>; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ vin-supply = <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + +- vcc5v0_typec: vcc5v0-typec-regulator { ++ /* LCD panel power, called VCC3V3_S0 in schematic */ ++ vcc3v3_panel: vcc3v3-panel { + compatible = "regulator-fixed"; + enable-active-high; +- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; ++ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&vcc5v0_typec_en>; +- regulator-name = "vcc5v0_typec"; +- vin-supply = <&vcc_sys>; ++ pinctrl-0 = <&lcdvcc_en>; ++ regulator-name = "vcc3v3_panel"; ++ regulator-always-on; ++ regulator-enable-ramp-delay = <100000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; + }; + +- vcc_sys: vcc-sys { ++ /* M.2 adapter power, switched by vcc1v8_s3 */ ++ vcc3v3_ssd: vcc3v3-ssd { + compatible = "regulator-fixed"; +- regulator-name = "vcc_sys"; ++ regulator-name = "vcc3v3_ssd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* Regulators supplied by vcc5v0_usb */ ++ /* USB 3 port power supply regulator */ ++ vcc5v0_otg: vcc5v0-otg { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ regulator-name = "vcc5v0_otg"; + regulator-always-on; +- regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +- vin-supply = <&dc_12v>; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; + }; + +- vdd_log: vdd-log { +- compatible = "pwm-regulator"; +- pwms = <&pwm2 0 25000 1>; +- pwm-supply = <&vcc_sys>; +- regulator-name = "vdd_log"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <800000>; +- regulator-max-microvolt = <1400000>; ++ /* Regualtors supplied by vcc5v0_usb */ ++ /* Type C port power supply regulator */ ++ vbus_5vout: vbus-5vout { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_typec0_en>; ++ regulator-name = "vbus_5vout"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_usb>; + }; + + mains_charger: dc-charger { +@@ -463,18 +501,20 @@ + rockchip,system-power-controller; + wakeup-source; + +- vcc1-supply = <&vcc_sys>; +- vcc2-supply = <&vcc_sys>; +- vcc3-supply = <&vcc_sys>; +- vcc4-supply = <&vcc_sys>; +- vcc6-supply = <&vcc_sys>; +- vcc7-supply = <&vcc_sys>; ++ vcc1-supply = <&vcc_sysin>; ++ vcc2-supply = <&vcc_sysin>; ++ vcc3-supply = <&vcc_sysin>; ++ vcc4-supply = <&vcc_sysin>; ++ vcc6-supply = <&vcc_sysin>; ++ vcc7-supply = <&vcc_sysin>; + vcc8-supply = <&vcc3v3_sys>; +- vcc9-supply = <&vcc_sys>; +- vcc10-supply = <&vcc_sys>; +- vcc11-supply = <&vcc_sys>; ++ vcc9-supply = <&vcc_sysin>; ++ vcc10-supply = <&vcc_sysin>; ++ vcc11-supply = <&vcc_sysin>; + vcc12-supply = <&vcc3v3_sys>; +- vddio-supply = <&vcc1v8_pmu>; ++ vcc13-supply = <&vcc_sysin>; ++ vcc14-supply = <&vcc_sysin>; ++ vddio-supply = <&vcc_3v0>; + + regulators { + vdd_center: DCDC_REG1 { +@@ -648,7 +688,7 @@ + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc_1v8>; + + regulator-state-mem { + regulator-off-in-suspend; +@@ -669,7 +709,7 @@ + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; +- vin-supply = <&vcc_sys>; ++ vin-supply = <&vcc_1v8>; + + regulator-state-mem { + regulator-off-in-suspend; +@@ -712,7 +752,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; + fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; +- vbus-supply = <&vcc5v0_typec>; ++ vbus-supply = <&vbus_5vout>; + status = "okay"; + connector { + compatible = "usb-c-connector"; +@@ -786,7 +826,7 @@ + max-link-speed = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; +- vpcie3v3-supply = <&vcc3v3_pcie>; ++ vpcie3v3-supply = <&vcc3v3_ssd>; + bus-scan-delay-ms = <1000>; + status = "okay"; + }; +@@ -836,14 +876,16 @@ + }; + + lcd-panel { +- lcd_panel_reset: lcd-panel-reset { +- rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; ++ lcdvcc_en: lcdvcc-en { ++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; +- }; + +- pcie { +- pcie_pwr_en: pcie-pwr-en { +- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ panel_en: panel-en { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lcd_panel_reset: lcd-panel-reset { ++ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + +@@ -867,8 +909,15 @@ + }; + }; + ++ sdcard { ++ sdmmc0_pwr_h: sdmmc0-pwr-h { ++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ }; ++ + usb-typec { +- vcc5v0_typec_en: vcc5v0_typec_en { ++ vcc5v0_typec0_en: vcc5v0_typec0_en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +@@ -984,7 +1033,7 @@ + }; + + u2phy0_host: host-port { +- phy-supply = <&vcc5v0_host>; ++ phy-supply = <&vcc5v0_otg>; + status = "okay"; + }; + }; +@@ -997,7 +1046,7 @@ + }; + + u2phy1_host: host-port { +- phy-supply = <&vcc5v0_host>; ++ phy-supply = <&vcc5v0_otg>; + status = "okay"; + }; + }; +-- +2.25.4 + + +From 93500fe151fc8c7625bc72f4e942634240497104 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 2 Jan 2020 13:44:04 +0100 +Subject: [PATCH 72/98] arm64/dts: add aliases to regulator names + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 20 +++++++++++-------- + 1 file changed, 12 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index e88cd951e1fb..48ee7527f0f3 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -208,7 +208,7 @@ + status = "okay"; + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; +- vcc-supply = <&vcc5v0_usb>; ++ vcc-supply = <&pa_5v>; + sound-name-prefix = "Speaker Amplifier"; + }; + +@@ -237,7 +237,7 @@ + }; + + /* Main 3.3 V supply */ +- vcc3v3_sys: vcc3v3-sys { ++ vcc3v3_sys: wifi_bat: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; +@@ -252,7 +252,7 @@ + }; + + /* 5 V USB power supply */ +- vcc5v0_usb: vcc5v0-usb-regulator { ++ vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; +@@ -375,7 +375,7 @@ + + /* Regualtors supplied by vcc5v0_usb */ + /* Type C port power supply regulator */ +- vbus_5vout: vbus-5vout { ++ vbus_5vout: vbus_typec: vbus-5vout { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; +@@ -385,6 +385,10 @@ + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; + }; + + mains_charger: dc-charger { +@@ -550,7 +554,7 @@ + }; + }; + +- vcc_1v8: DCDC_REG4 { ++ vcc_1v8: vcc_wl: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; +@@ -752,7 +756,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; + fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; +- vbus-supply = <&vbus_5vout>; ++ vbus-supply = <&vbus_typec>; + status = "okay"; + connector { + compatible = "usb-c-connector"; +@@ -1068,8 +1072,8 @@ + device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; +- vbat-supply = <&vcc3v3_sys>; +- vddio-supply = <&vcc_1v8>; ++ vbat-supply = <&wifi_bat>; ++ vddio-supply = <&vcc_wl>; + }; + }; + +-- +2.25.4 + + +From 3d2cd6c0c4093348d309e13d5435193895a183ea Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 3 Jan 2020 13:25:57 +0100 +Subject: [PATCH 73/98] arm64/dts: Remove superfluous comment from panel node + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 48ee7527f0f3..4abaa23b29ca 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -16,7 +16,7 @@ + model = "Pine64 Pinebook Pro"; + compatible = "pine64,pinebook-pro", "rockchip,rk3399"; + +- edp_panel: edp-panel { /* "boe,nv140fhmn49" */ ++ edp_panel: edp-panel { + compatible = "boe,nv140fhmn49", "simple-panel"; + backlight = <&backlight>; + power-supply = <&vcc3v3_panel>; +-- +2.25.4 + + +From c056f26c783e705c49a70e6de2d0b934bd43f38a Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 3 Jan 2020 13:26:53 +0100 +Subject: [PATCH 74/98] arm64/dts: Add ports to typec connector + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 45 +++++++++++++++++++ + 1 file changed, 45 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 4abaa23b29ca..39ceb4251d56 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -768,6 +768,29 @@ + op-sink-microwatt = <1000000>; + extcon-cables = <1 2 5 6 9 10 12 44>; + typec-altmodes = <0xff01 1 0x001c0000 1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ usbc_hs: endpoint { ++ remote-endpoint = <&u2phy0_typec_hs>; ++ }; ++ }; ++ ++ port@1 { ++ usbc_ss: endpoint { ++ remote-endpoint = <&tcphy0_typec_ss>; ++ }; ++ }; ++ ++ port@2 { ++ usbc_dp: endpoint { ++ remote-endpoint = <&tcphy0_typec_dp>; ++ }; ++ }; ++ }; + }; + }; + +@@ -1017,6 +1040,22 @@ + status = "okay"; + }; + ++&tcphy0_dp { ++ port { ++ tcphy0_typec_dp: endpoint { ++ remote-endpoint = <&usbc_dp>; ++ }; ++ }; ++}; ++ ++&tcphy0_usb3 { ++ port { ++ tcphy0_typec_ss: endpoint { ++ remote-endpoint = <&usbc_ss>; ++ }; ++ }; ++}; ++ + &tcphy1 { + status = "okay"; + }; +@@ -1040,6 +1079,12 @@ + phy-supply = <&vcc5v0_otg>; + status = "okay"; + }; ++ ++ port { ++ u2phy0_typec_hs: endpoint { ++ remote-endpoint = <&usbc_hs>; ++ }; ++ }; + }; + + &u2phy1 { +-- +2.25.4 + + +From b4d80935cb84c27d49f1c04a67eef08a4c38088f Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 9 Jan 2020 09:24:07 +0100 +Subject: [PATCH 75/98] drm/bridge: fix integer type used for storing dp link + rate + +commit ff1e8fb68ea0 chnaged the link traning logic to remove use of +drm_dp_link helpers. However the new logic stores the maximum link rate +in a u8, overflwoing it. +This commit changes the logic to store the max link rate in a unsigned int +instead. +--- + drivers/gpu/drm/bridge/analogix-anx78xx.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/bridge/analogix-anx78xx.c b/drivers/gpu/drm/bridge/analogix-anx78xx.c +index 3c7cc5af735c..99bf5ad3a386 100644 +--- a/drivers/gpu/drm/bridge/analogix-anx78xx.c ++++ b/drivers/gpu/drm/bridge/analogix-anx78xx.c +@@ -738,6 +738,7 @@ static int anx78xx_init_pdata(struct anx78xx *anx78xx) + static int anx78xx_dp_link_training(struct anx78xx *anx78xx) + { + u8 dp_bw, value; ++ unsigned int max_link_rate; + int err; + + err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG, +@@ -840,7 +841,8 @@ static int anx78xx_dp_link_training(struct anx78xx *anx78xx) + if (err) + return err; + +- value = drm_dp_link_rate_to_bw_code(anx78xx->link.rate); ++ max_link_rate = drm_dp_max_link_rate(anx78xx->dpcd); ++ value = drm_dp_link_rate_to_bw_code(max_link_rate); + err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], + SP_DP_MAIN_LINK_BW_SET_REG, value); + if (err) +-- +2.25.4 + + +From 2e94a93364284c6431f6d3da6e49959315463689 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 30 Jan 2020 01:27:29 +0100 +Subject: [PATCH 76/98] arm64/dts: Update defconfig to 5.5 + +--- + arch/arm64/configs/pinebook_pro_defconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index 884f07fcc590..ddd73a27a2b5 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -51,7 +51,6 @@ CONFIG_PARAVIRT_TIME_ACCOUNTING=y + CONFIG_KEXEC=y + CONFIG_KEXEC_FILE=y + CONFIG_COMPAT=y +-# CONFIG_ARM64_LSE_ATOMICS is not set + CONFIG_ARM64_ACPI_PARKING_PROTOCOL=y + CONFIG_CMDLINE="console=ttyAMA0" + CONFIG_HIBERNATION=y +-- +2.25.4 + + +From 44bed2fc8b678330fe610712e858e63891598df2 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sun, 2 Feb 2020 16:26:50 +0100 +Subject: [PATCH 77/98] arm64/dts: Default to s2idle sleep + +Workaround for broken suspend to RAM. Not quite as power-saving but still better than keeping the device running +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 39ceb4251d56..809da9b5f3e1 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -39,7 +39,7 @@ + }; + + chosen { +- bootargs = "earlycon=uart8250,mmio32,0xff1a0000"; ++ bootargs = "earlycon=uart8250,mmio32,0xff1a0000 mem_sleep_default=s2idle"; + stdout-path = "serial2:1500000n8"; + }; + +-- +2.25.4 + + +From e37fcb640366b690333dc695ad1c0fcaa95064c8 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 5 Feb 2020 19:02:13 +0100 +Subject: [PATCH 78/98] arm64/dts: Remove autorepeat from gpio-keys + +Suggested by Will Springer. Autorepeat does not make any sense here +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 809da9b5f3e1..f0eb44759b29 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -82,7 +82,6 @@ + + gpio-keys { + compatible = "gpio-keys"; +- autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn &lidbtn>; + +-- +2.25.4 + + +From 5f496da4a42a2496fedb81bd916f28b22fac2515 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Wed, 5 Feb 2020 20:50:38 +0100 +Subject: [PATCH 79/98] arm64/dts: Add LED function and color properties + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index f0eb44759b29..0ea8c9fb36c1 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -8,7 +8,7 @@ + #include + #include + #include +-//#include ++#include + #include "rk3399.dtsi" + #include "rk3399-opp.dtsi" + +@@ -52,20 +52,20 @@ + green-led { + gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>; + label = "green:disk-activity"; +-// function = LED_FUNCTION_POWER; ++ function = LED_FUNCTION_POWER; + linux,default-trigger = "disk-activity"; + default-state = "off"; +-// color = ; ++ color = ; + }; + + red-led { + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + label = "red:standby"; +-// function = LED_FUNCTION_STANDBY; ++ function = LED_FUNCTION_STANDBY; + default-state = "off"; + panic-indicator; + retain-state-suspended; +-// color = ; ++ color = ; + }; + }; + +-- +2.25.4 + + +From 850118c58f27667d5d214729a0d86238bbc3ffe4 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 6 Feb 2020 01:41:05 +0100 +Subject: [PATCH 80/98] soc/codecs: es8316: Do not dereference NULL pointer on + jack remove before add + +Previously an error during device bringup could result in an oops by dereferencing +a member of es8316->jack which was NULL +--- + sound/soc/codecs/es8316.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/es8316.c b/sound/soc/codecs/es8316.c +index 36eef1fb3d18..b303ebbd5f53 100644 +--- a/sound/soc/codecs/es8316.c ++++ b/sound/soc/codecs/es8316.c +@@ -687,7 +687,7 @@ static void es8316_disable_jack_detect(struct snd_soc_component *component) + snd_soc_component_update_bits(component, ES8316_GPIO_DEBOUNCE, + ES8316_GPIO_ENABLE_INTERRUPT, 0); + +- if (es8316->jack->status & SND_JACK_MICROPHONE) { ++ if (es8316->jack && (es8316->jack->status & SND_JACK_MICROPHONE)) { + es8316_disable_micbias_for_mic_gnd_short_detect(component); + snd_soc_jack_report(es8316->jack, 0, SND_JACK_BTN_0); + } +-- +2.25.4 + + +From 8b2189ed7043c81c7cc059cb2c1abe7339d6fa25 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 6 Feb 2020 03:01:32 +0100 +Subject: [PATCH 81/98] arm64/dts: Add headphone detect pinctrl + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 0ea8c9fb36c1..e5c929a0b890 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -174,6 +174,8 @@ + es8316-sound { + status = "okay"; + compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det_gpio>; + simple-audio-card,name = "rockchip,es8316-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; +@@ -979,6 +981,13 @@ + <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; ++ ++ es8316 { ++ hp_det_gpio: hp-det { ++ rockchip,pins = ++ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; + }; + + &pwm0 { +-- +2.25.4 + + +From 458d0e9d790f47b88474540936cb3611b3e9eed1 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 6 Feb 2020 03:02:03 +0100 +Subject: [PATCH 82/98] arm64/dts: Fix amplifier VCC-supply parameter + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index e5c929a0b890..763ecd79d792 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -209,7 +209,7 @@ + status = "okay"; + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; +- vcc-supply = <&pa_5v>; ++ VCC-supply = <&pa_5v>; + sound-name-prefix = "Speaker Amplifier"; + }; + +-- +2.25.4 + + +From 2baffd2b86f36654d4d2cd2faa7ec9af59af2ad3 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 6 Feb 2020 14:55:38 +0100 +Subject: [PATCH 83/98] arm64/dts: Split gpio-keys into separate nodes for + power key and lid switch + +Suggested by Will Springer. Allows selective disable of wakeup functionality +without killing e.g. screen blanking on lid close. +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 763ecd79d792..92f70a048aaa 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -5,6 +5,7 @@ + */ + + /dts-v1/; ++#include + #include + #include + #include +@@ -80,10 +81,12 @@ + }; + }; + +- gpio-keys { ++ /* Use separate nodes for gpio-keys to enable selective deactivation of ++ wakeup sources without disabling the whole key */ ++ gpio-key-power { + compatible = "gpio-keys"; + pinctrl-names = "default"; +- pinctrl-0 = <&pwrbtn &lidbtn>; ++ pinctrl-0 = <&pwrbtn>; + + power { + debounce-interval = <20>; +@@ -92,6 +95,12 @@ + linux,code = ; + wakeup-source; + }; ++ }; ++ ++ gpio-key-lid { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lidbtn>; + + lid { + debounce-interval = <20>; +@@ -99,6 +108,7 @@ + label = "Lid"; + linux,code = ; + linux,input-type = ; ++ wakeup-event-action = ; + wakeup-source; + }; + }; +-- +2.25.4 + + +From e3a5e3ad3f4274e00348568cfc7a47ec750cfa6a Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 7 Feb 2020 14:32:43 +0100 +Subject: [PATCH 84/98] arm64/dts: Fix io domain power supplies + +The audio domain is supplied by vcc_3v0 and the bt656 domain is not supplied at all. +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 92f70a048aaa..a9ec0522bb90 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -848,8 +848,7 @@ + &io_domains { + status = "okay"; + +- bt656-supply = <&vcc1v8_dvp>; +- audio-supply = <&vcca1v8_codec>; ++ audio-supply = <&vcc_3v0>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; + }; +-- +2.25.4 + + +From 7851c8e804adb9757a267d09a6595dc50559a23a Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Fri, 7 Feb 2020 14:38:52 +0100 +Subject: [PATCH 85/98] arm64/dts: Add manual speaker volume control +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This commit adds an ALSA control for the speaá¸ħer amplifier. + +Whiel this gives pulseaudio a meaningful distinction between speaker and headphones +pulseaudio does unfortunately also turn down the headphones by -48 dB whenever +the speaker is selected. Since the headphone out and the speaker in are connected +in parallel this reduces maximum volume of the speakers drastically. However, I deem +it better than not being able to control the amplifier state at all. +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index a9ec0522bb90..b0363a2554b7 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -203,8 +203,9 @@ + "Speaker", "Speaker Amplifier OUTL", + "Speaker", "Speaker Amplifier OUTR"; + +- simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; ++ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; + simple-audio-card,aux-devs = <&speaker_amp>; ++ simple-audio-card,pin-switches = "Speaker"; + + simple-audio-card,cpu { + sound-dai = <&i2s1>; +-- +2.25.4 + + +From ea96c145d85f2c85fa26c020d1822c0348f90c01 Mon Sep 17 00:00:00 2001 +From: Jianhong Chen +Date: Thu, 29 Sep 2016 20:14:36 +0800 +Subject: [PATCH 86/98] firmware: rockchip: sip: add rockchip SIP runtime + service + +Change-Id: I996a90b3f6cb471f255566dfab0059a55da8866d +Signed-off-by: Jianhong Chen +--- + drivers/firmware/Kconfig | 7 ++ + drivers/firmware/Makefile | 1 + + drivers/firmware/rockchip_sip.c | 155 ++++++++++++++++++++++++++ + include/linux/rockchip/rockchip_sip.h | 86 ++++++++++++++ + 4 files changed, 249 insertions(+) + create mode 100644 drivers/firmware/rockchip_sip.c + create mode 100644 include/linux/rockchip/rockchip_sip.h + +diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig +index e40a77bfe821..6d3549914c99 100644 +--- a/drivers/firmware/Kconfig ++++ b/drivers/firmware/Kconfig +@@ -306,6 +306,13 @@ config TURRIS_MOX_RWTM + config HAVE_ARM_SMCCC + bool + ++config ROCKCHIP_SIP ++ bool "Rockchip SIP interface" ++ depends on ARM64 && ARM_PSCI_FW ++ help ++ Say Y here if you want to enable SIP callbacks for Rockchip platforms ++ This option enables support for communicating with the ATF. ++ + source "drivers/firmware/psci/Kconfig" + source "drivers/firmware/broadcom/Kconfig" + source "drivers/firmware/google/Kconfig" +diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile +index 3fcb91975bdc..be7a14093483 100644 +--- a/drivers/firmware/Makefile ++++ b/drivers/firmware/Makefile +@@ -32,6 +32,7 @@ obj-y += meson/ + obj-$(CONFIG_GOOGLE_FIRMWARE) += google/ + obj-$(CONFIG_EFI) += efi/ + obj-$(CONFIG_UEFI_CPER) += efi/ ++obj-$(CONFIG_ROCKCHIP_SIP) += rockchip_sip.o + obj-y += imx/ + obj-y += tegra/ + obj-y += xilinx/ +diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c +new file mode 100644 +index 000000000000..f1d7e0cd981d +--- /dev/null ++++ b/drivers/firmware/rockchip_sip.c +@@ -0,0 +1,155 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SIZE_PAGE(n) ((n) << 12) ++ ++static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id, ++ unsigned long arg0, ++ unsigned long arg1, ++ unsigned long arg2) ++{ ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res); ++ return res; ++} ++ ++struct arm_smccc_res sip_smc_ddr_cfg(uint32_t arg0, uint32_t arg1, ++ uint32_t arg2) ++{ ++ return __invoke_sip_fn_smc(SIP_DDR_CFG32, arg0, arg1, arg2); ++} ++ ++struct arm_smccc_res sip_smc_get_atf_version(void) ++{ ++ return __invoke_sip_fn_smc(SIP_ATF_VERSION32, 0, 0, 0); ++} ++ ++struct arm_smccc_res sip_smc_get_sip_version(void) ++{ ++ return __invoke_sip_fn_smc(SIP_SIP_VERSION32, 0, 0, 0); ++} ++ ++int sip_smc_set_suspend_mode(uint32_t mode) ++{ ++ struct arm_smccc_res res; ++ ++ res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE32, mode, 0, 0); ++ ++ return res.a0; ++} ++ ++static u64 ft_fiq_mem_phy; ++static void __iomem *ft_fiq_mem_base; ++static void (*psci_fiq_debugger_uart_irq_tf)(void *reg_base, u64 sp_el1); ++static u32 fig_init_flag; ++ ++u32 rockchip_psci_smc_get_tf_ver(void) ++{ ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); ++ return 0x00010005; ++} ++ ++void psci_fiq_debugger_uart_irq_tf_cb(u64 sp_el1, u64 offset) ++{ ++ psci_fiq_debugger_uart_irq_tf((char *)ft_fiq_mem_base + offset, sp_el1); ++ __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, 0, 0, ++ UARTDBG_CFG_OSHDL_TO_OS); ++} ++ ++void psci_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback) ++{ ++ struct arm_smccc_res sip_smmc; ++ ++ psci_fiq_debugger_uart_irq_tf = callback; ++ sip_smmc = __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, irq_id, ++ (u64)psci_fiq_debugger_uart_irq_tf_cb, ++ UARTDBG_CFG_INIT); ++ ft_fiq_mem_phy = sip_smmc.a0; ++ ft_fiq_mem_base = ioremap(ft_fiq_mem_phy, 8 * 1024); ++ fig_init_flag = 1; ++} ++ ++void psci_enable_fiq(void) ++{ ++ int irq_flag; ++ int cpu_id; ++ ++ if (fig_init_flag != 1) ++ return; ++ irq_flag = *((char *)(ft_fiq_mem_base) + 8 * 1024 - 0x04); ++ ++ cpu_id = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; ++ if ((irq_flag == 0xAA) && (cpu_id == 0)) ++ __invoke_sip_fn_smc(RK_SIP_ENABLE_FIQ, 0, 0, 0); ++} ++ ++u32 psci_fiq_debugger_switch_cpu(u32 cpu) ++{ ++ struct arm_smccc_res sip_smmc; ++ ++ sip_smmc = __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, ++ cpu_logical_map(cpu), ++ 0, UARTDBG_CFG_OSHDL_CPUSW); ++ return sip_smmc.a0; ++} ++ ++void psci_fiq_debugger_enable_debug(bool val) ++{ ++ if (val) ++ __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, 0, ++ 0, UARTDBG_CFG_OSHDL_DEBUG_ENABLE); ++ else ++ __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, 0, ++ 0, UARTDBG_CFG_OSHDL_DEBUG_DISABLE); ++} ++ ++int psci_fiq_debugger_set_print_port(u32 port, u32 baudrate) ++{ ++ struct arm_smccc_res res; ++ ++ res = __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, port, baudrate, ++ UARTDBG_CFG_PRINT_PORT); ++ return res.a0; ++} ++ ++struct arm_smccc_res sip_smc_get_share_mem_page(u32 page_num, ++ share_page_type_t page_type) ++{ ++ struct arm_smccc_res res; ++ unsigned long share_mem_phy; ++ ++ res = __invoke_sip_fn_smc(SIP_SHARE_MEM32, page_num, page_type, 0); ++ if (res.a0) ++ goto error; ++ ++ share_mem_phy = res.a1; ++ res.a1 = (unsigned long)ioremap(share_mem_phy, SIZE_PAGE(page_num)); ++ ++error: ++ return res; ++} ++ ++struct arm_smccc_res sip_smc_get_call_count(void) ++{ ++ return __invoke_sip_fn_smc(SIP_SVC_CALL_COUNT, 0, 0, 0); ++} +diff --git a/include/linux/rockchip/rockchip_sip.h b/include/linux/rockchip/rockchip_sip.h +new file mode 100644 +index 000000000000..8740a058772c +--- /dev/null ++++ b/include/linux/rockchip/rockchip_sip.h +@@ -0,0 +1,86 @@ ++/* Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 and ++ * only version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++#ifndef __ROCKCHIP_SIP_H ++#define __ROCKCHIP_SIP_H ++ ++#include ++#include ++ ++/* SMC function IDs for SiP Service queries */ ++#define SIP_SVC_CALL_COUNT 0x8200ff00 ++#define SIP_SVC_UID 0x8200ff01 ++#define SIP_SVC_VERSION 0x8200ff03 ++ ++#define SIP_ATF_VERSION32 0x82000001 ++#define SIP_SUSPEND_MODE32 0x82000003 ++#define SIP_DDR_CFG32 0x82000008 ++#define SIP_SHARE_MEM32 0x82000009 ++#define SIP_SIP_VERSION32 0x8200000a ++ ++/* Share mem page types */ ++typedef enum { ++ SHARE_PAGE_TYPE_INVALID = 0, ++ SHARE_PAGE_TYPE_UARTDBG, ++ SHARE_PAGE_TYPE_MAX, ++} share_page_type_t; ++ ++/* Error return code */ ++#define SIP_RET_SUCCESS 0 ++#define SIP_RET_NOT_SUPPORTED -1 ++#define SIP_RET_INVALID_PARAMS -2 ++#define SIP_RET_INVALID_ADDRESS -3 ++#define SIP_RET_DENIED -4 ++#define SIP_RET_SMC_UNKNOWN 0xffffffff ++ ++/* Sip version */ ++#define SIP_IMPLEMENT_V1 (1) ++#define SIP_IMPLEMENT_V2 (2) ++ ++#define RK_SIP_DISABLE_FIQ 0xc2000006 ++#define RK_SIP_ENABLE_FIQ 0xc2000007 ++#define PSCI_SIP_RKTF_VER 0x82000001 ++#define PSCI_SIP_ACCESS_REG 0x82000002 ++#define PSCI_SIP_ACCESS_REG64 0xc2000002 ++#define PSCI_SIP_SUSPEND_WR_CTRBITS 0x82000003 ++#define PSCI_SIP_PENDING_CPUS 0x82000004 ++#define PSCI_SIP_UARTDBG_CFG 0x82000005 ++#define PSCI_SIP_UARTDBG_CFG64 0xc2000005 ++#define PSCI_SIP_EL3FIQ_CFG 0x82000006 ++#define PSCI_SIP_SMEM_CONFIG 0x82000007 ++ ++#define UARTDBG_CFG_INIT 0xf0 ++#define UARTDBG_CFG_OSHDL_TO_OS 0xf1 ++#define UARTDBG_CFG_OSHDL_CPUSW 0xf3 ++#define UARTDBG_CFG_OSHDL_DEBUG_ENABLE 0xf4 ++#define UARTDBG_CFG_OSHDL_DEBUG_DISABLE 0xf5 ++#define UARTDBG_CFG_PRINT_PORT 0xf7 ++ ++/* struct arm_smccc_res: a0: error code; a1~a3: data */ ++/* SMC32 Calls */ ++int sip_smc_set_suspend_mode(uint32_t mode); ++struct arm_smccc_res sip_smc_get_call_count(void); ++struct arm_smccc_res sip_smc_get_atf_version(void); ++struct arm_smccc_res sip_smc_get_sip_version(void); ++struct arm_smccc_res sip_smc_ddr_cfg(uint32_t arg0, uint32_t arg1, ++ uint32_t arg2); ++struct arm_smccc_res sip_smc_get_share_mem_page(uint32_t page_num, ++ share_page_type_t page_type); ++ ++void psci_enable_fiq(void); ++u32 rockchip_psci_smc_get_tf_ver(void); ++void psci_fiq_debugger_uart_irq_tf_cb(u64 sp_el1, u64 offset); ++void psci_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback); ++u32 psci_fiq_debugger_switch_cpu(u32 cpu); ++void psci_fiq_debugger_enable_debug(bool val); ++int psci_fiq_debugger_set_print_port(u32 port, u32 baudrate); ++ ++#endif +-- +2.25.4 + + +From af1f300a13d098d252d32934840dc29142a19021 Mon Sep 17 00:00:00 2001 +From: Shengfei xu +Date: Thu, 5 Jan 2017 16:55:54 +0800 +Subject: [PATCH 87/98] suspend: rockchip: set the suspend config to ATF + +Change-Id: I400aa252c24b814e3da7fa6703a4e03a1c90d572 +Signed-off-by: Shengfei xu +--- + .../soc/rockchip/rockchip-pm-config.txt | 39 ++++++ + drivers/firmware/rockchip_sip.c | 13 +- + drivers/soc/rockchip/Kconfig | 6 + + drivers/soc/rockchip/Makefile | 1 + + drivers/soc/rockchip/rockchip_pm_config.c | 120 ++++++++++++++++++ + include/dt-bindings/suspend/rockchip-rk3399.h | 60 +++++++++ + include/linux/rockchip/rockchip_sip.h | 17 ++- + 7 files changed, 247 insertions(+), 9 deletions(-) + create mode 100644 Documentation/devicetree/bindings/soc/rockchip/rockchip-pm-config.txt + create mode 100644 drivers/soc/rockchip/rockchip_pm_config.c + create mode 100644 include/dt-bindings/suspend/rockchip-rk3399.h + +diff --git a/Documentation/devicetree/bindings/soc/rockchip/rockchip-pm-config.txt b/Documentation/devicetree/bindings/soc/rockchip/rockchip-pm-config.txt +new file mode 100644 +index 000000000000..a8fd70f17597 +--- /dev/null ++++ b/Documentation/devicetree/bindings/soc/rockchip/rockchip-pm-config.txt +@@ -0,0 +1,39 @@ ++* the suspend mode config ++ ++- compatible: "rockchip,pm-config" ++ Compatibility with rk3399 ++ ++- rockchip,sleep-mode-config : the sleep mode config, ++ ARMOFF, OSC disabled ... ++ ++- rockchip,wakeup-config: the wake up sourece enable. ++ GPIO, USB, SD... ++ ++- rockchip,pwm-regulator-config: the pwm regulator name. ++ ++Example: ++ rockchip_suspend: rockchip_suspend { ++ compatible = "rockchip,pm-rk3399"; ++ status = "okay"; ++ rockchip,sleep-mode-config = < ++ (0 ++ | RKPM_SLP_ARMPD ++ | RKPM_SLP_PERILPPD ++ | RKPM_SLP_DDR_RET ++ | RKPM_SLP_PLLPD ++ | RKPM_SLP_OSC_DIS ++ | RKPM_SLP_CENTER_PD ++ | RKPM_SLP_AP_PWROFF ++ ) ++ >; ++ rockchip,wakeup-config = < ++ (0 | ++ RKPM_GPIO_WKUP_EN | ++ RKPM_PWM_WKUP_EN) ++ >; ++ rockchip,pwm-regulator-config = < ++ (0 | ++ PWM2_REGULATOR_EN ++ ) ++ >; ++ }; +diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c +index f1d7e0cd981d..a7f2db58c21c 100644 +--- a/drivers/firmware/rockchip_sip.c ++++ b/drivers/firmware/rockchip_sip.c +@@ -31,8 +31,8 @@ static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id, + return res; + } + +-struct arm_smccc_res sip_smc_ddr_cfg(uint32_t arg0, uint32_t arg1, +- uint32_t arg2) ++struct arm_smccc_res sip_smc_ddr_cfg(u32 arg0, u32 arg1, ++ u32 arg2) + { + return __invoke_sip_fn_smc(SIP_DDR_CFG32, arg0, arg1, arg2); + } +@@ -47,11 +47,14 @@ struct arm_smccc_res sip_smc_get_sip_version(void) + return __invoke_sip_fn_smc(SIP_SIP_VERSION32, 0, 0, 0); + } + +-int sip_smc_set_suspend_mode(uint32_t mode) ++int sip_smc_set_suspend_mode(u32 ctrl, ++ u32 config1, ++ u32 config2) + { + struct arm_smccc_res res; + +- res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE32, mode, 0, 0); ++ res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE32, ctrl, ++ config1, config2); + + return res.a0; + } +@@ -128,7 +131,7 @@ int psci_fiq_debugger_set_print_port(u32 port, u32 baudrate) + struct arm_smccc_res res; + + res = __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, port, baudrate, +- UARTDBG_CFG_PRINT_PORT); ++ UARTDBG_CFG_PRINT_PORT); + return res.a0; + } + +diff --git a/drivers/soc/rockchip/Kconfig b/drivers/soc/rockchip/Kconfig +index b71b73bf5fc5..bfadbecd0df8 100644 +--- a/drivers/soc/rockchip/Kconfig ++++ b/drivers/soc/rockchip/Kconfig +@@ -26,4 +26,10 @@ config ROCKCHIP_PM_DOMAINS + + If unsure, say N. + ++config ROCKCHIP_SUSPEND_MODE ++ bool "Rockchip suspend mode config" ++ depends on ROCKCHIP_SIP ++ help ++ Say Y here if you want to set the suspend mode to the ATF. ++ + endif +diff --git a/drivers/soc/rockchip/Makefile b/drivers/soc/rockchip/Makefile +index afca0a4c4b72..a15c0a395a33 100644 +--- a/drivers/soc/rockchip/Makefile ++++ b/drivers/soc/rockchip/Makefile +@@ -4,3 +4,4 @@ + # + obj-$(CONFIG_ROCKCHIP_GRF) += grf.o + obj-$(CONFIG_ROCKCHIP_PM_DOMAINS) += pm_domains.o ++obj-$(CONFIG_ROCKCHIP_SUSPEND_MODE) += rockchip_pm_config.o +diff --git a/drivers/soc/rockchip/rockchip_pm_config.c b/drivers/soc/rockchip/rockchip_pm_config.c +new file mode 100644 +index 000000000000..a649d6e7f082 +--- /dev/null ++++ b/drivers/soc/rockchip/rockchip_pm_config.c +@@ -0,0 +1,120 @@ ++/* ++ * Rockchip Generic power configuration support. ++ * ++ * Copyright (c) 2017 ROCKCHIP, Co. Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PM_INVALID_GPIO 0xffff ++ ++static const struct of_device_id pm_match_table[] = { ++ { .compatible = "rockchip,pm-rk3399",}, ++ { }, ++}; ++ ++static int __init pm_config_init(struct platform_device *pdev) ++{ ++ const struct of_device_id *match_id; ++ struct device_node *node; ++ u32 mode_config = 0; ++ u32 wakeup_config = 0; ++ u32 pwm_regulator_config = 0; ++ int gpio_temp[10]; ++ u32 sleep_debug_en = 0; ++ u32 apios_suspend = 0; ++ enum of_gpio_flags flags; ++ int i = 0; ++ int length; ++ ++ match_id = of_match_node(pm_match_table, pdev->dev.of_node); ++ if (!match_id) ++ return -ENODEV; ++ ++ node = of_find_node_by_name(NULL, "rockchip-suspend"); ++ ++ if (IS_ERR_OR_NULL(node)) { ++ dev_err(&pdev->dev, "%s dev node err\n", __func__); ++ return -ENODEV; ++ } ++ ++ if (of_property_read_u32_array(node, ++ "rockchip,sleep-mode-config", ++ &mode_config, 1)) ++ dev_warn(&pdev->dev, "not set sleep mode config\n"); ++ else ++ sip_smc_set_suspend_mode(SUSPEND_MODE_CONFIG, mode_config, 0); ++ ++ if (of_property_read_u32_array(node, ++ "rockchip,wakeup-config", ++ &wakeup_config, 1)) ++ dev_warn(&pdev->dev, "not set wakeup-config\n"); ++ else ++ sip_smc_set_suspend_mode(WKUP_SOURCE_CONFIG, wakeup_config, 0); ++ ++ if (of_property_read_u32_array(node, ++ "rockchip,pwm-regulator-config", ++ &pwm_regulator_config, 1)) ++ dev_warn(&pdev->dev, "not set pwm-regulator-config\n"); ++ else ++ sip_smc_set_suspend_mode(PWM_REGULATOR_CONFIG, ++ pwm_regulator_config, ++ 0); ++ ++ length = of_gpio_named_count(node, "rockchip,power-ctrl"); ++ ++ if (length > 0 && length < 10) { ++ for (i = 0; i < length; i++) { ++ gpio_temp[i] = of_get_named_gpio_flags(node, ++ "rockchip,power-ctrl", ++ i, ++ &flags); ++ if (!gpio_is_valid(gpio_temp[i])) ++ break; ++ sip_smc_set_suspend_mode(GPIO_POWER_CONFIG, ++ i, ++ gpio_temp[i]); ++ } ++ } ++ sip_smc_set_suspend_mode(GPIO_POWER_CONFIG, i, PM_INVALID_GPIO); ++ ++ if (!of_property_read_u32_array(node, ++ "rockchip,sleep-debug-en", ++ &sleep_debug_en, 1)) ++ sip_smc_set_suspend_mode(SUSPEND_DEBUG_ENABLE, ++ sleep_debug_en, ++ 0); ++ ++ if (!of_property_read_u32_array(node, ++ "rockchip,apios-suspend", ++ &apios_suspend, 1)) ++ sip_smc_set_suspend_mode(APIOS_SUSPEND_CONFIG, ++ apios_suspend, ++ 0); ++ ++ return 0; ++} ++ ++static struct platform_driver pm_driver = { ++ .driver = { ++ .name = "rockchip-pm", ++ .of_match_table = pm_match_table, ++ }, ++}; ++ ++static int __init rockchip_pm_drv_register(void) ++{ ++ return platform_driver_probe(&pm_driver, pm_config_init); ++} ++subsys_initcall(rockchip_pm_drv_register); +diff --git a/include/dt-bindings/suspend/rockchip-rk3399.h b/include/dt-bindings/suspend/rockchip-rk3399.h +new file mode 100644 +index 000000000000..0cccd6430ef6 +--- /dev/null ++++ b/include/dt-bindings/suspend/rockchip-rk3399.h +@@ -0,0 +1,60 @@ ++/* ++ * Header providing constants for Rockchip suspend bindings. ++ * ++ * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd ++ * Author: Tony.Xie ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#ifndef __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3399_H__ ++#define __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3399_H__ ++ ++/* the suspend mode */ ++#define RKPM_SLP_WFI (1 << 0) ++#define RKPM_SLP_ARMPD (1 << 1) ++#define RKPM_SLP_PERILPPD (1 << 2) ++#define RKPM_SLP_DDR_RET (1 << 3) ++#define RKPM_SLP_PLLPD (1 << 4) ++#define RKPM_SLP_OSC_DIS (1 << 5) ++#define RKPM_SLP_CENTER_PD (1 << 6) ++#define RKPM_SLP_AP_PWROFF (1 << 7) ++ ++/* the wake up source */ ++#define RKPM_CLUSTER_L_WKUP_EN (1 << 0) ++#define RKPM_CLUSTER_B_WKUPB_EN (1 << 1) ++#define RKPM_GPIO_WKUP_EN (1 << 2) ++#define RKPM_SDIO_WKUP_EN (1 << 3) ++#define RKPM_SDMMC_WKUP_EN (1 << 4) ++#define RKPM_TIMER_WKUP_EN (1 << 6) ++#define RKPM_USB_WKUP_EN (1 << 7) ++#define RKPM_SFT_WKUP_EN (1 << 8) ++#define RKPM_WDT_M0_WKUP_EN (1 << 9) ++#define RKPM_TIME_OUT_WKUP_EN (1 << 10) ++#define RKPM_PWM_WKUP_EN (1 << 11) ++#define RKPM_PCIE_WKUP_EN (1 << 13) ++ ++/* the pwm regulator */ ++#define PWM0_REGULATOR_EN (1 << 0) ++#define PWM1_REGULATOR_EN (1 << 1) ++#define PWM2_REGULATOR_EN (1 << 2) ++#define PWM3A_REGULATOR_EN (1 << 3) ++#define PWM3B_REGULATOR_EN (1 << 4) ++ ++/* the APIO voltage domain */ ++#define RKPM_APIO0_SUSPEND (1 << 0) ++#define RKPM_APIO1_SUSPEND (1 << 1) ++#define RKPM_APIO2_SUSPEND (1 << 2) ++#define RKPM_APIO3_SUSPEND (1 << 3) ++#define RKPM_APIO4_SUSPEND (1 << 4) ++#define RKPM_APIO5_SUSPEND (1 << 5) ++ ++#endif +diff --git a/include/linux/rockchip/rockchip_sip.h b/include/linux/rockchip/rockchip_sip.h +index 8740a058772c..c49e74ae79e5 100644 +--- a/include/linux/rockchip/rockchip_sip.h ++++ b/include/linux/rockchip/rockchip_sip.h +@@ -64,15 +64,24 @@ typedef enum { + #define UARTDBG_CFG_OSHDL_DEBUG_DISABLE 0xf5 + #define UARTDBG_CFG_PRINT_PORT 0xf7 + ++#define SUSPEND_MODE_CONFIG 0x01 ++#define WKUP_SOURCE_CONFIG 0x02 ++#define PWM_REGULATOR_CONFIG 0x03 ++#define GPIO_POWER_CONFIG 0x04 ++#define SUSPEND_DEBUG_ENABLE 0x05 ++#define APIOS_SUSPEND_CONFIG 0x06 ++ + /* struct arm_smccc_res: a0: error code; a1~a3: data */ + /* SMC32 Calls */ +-int sip_smc_set_suspend_mode(uint32_t mode); ++int sip_smc_set_suspend_mode(u32 ctrl, ++ u32 config1, ++ u32 config2); + struct arm_smccc_res sip_smc_get_call_count(void); + struct arm_smccc_res sip_smc_get_atf_version(void); + struct arm_smccc_res sip_smc_get_sip_version(void); +-struct arm_smccc_res sip_smc_ddr_cfg(uint32_t arg0, uint32_t arg1, +- uint32_t arg2); +-struct arm_smccc_res sip_smc_get_share_mem_page(uint32_t page_num, ++struct arm_smccc_res sip_smc_ddr_cfg(u32 arg0, u32 arg1, ++ u32 arg2); ++struct arm_smccc_res sip_smc_get_share_mem_page(u32 page_num, + share_page_type_t page_type); + + void psci_enable_fiq(void); +-- +2.25.4 + + +From 8e9f10f9f94671f1aae7fab5fadbd19e059d3c04 Mon Sep 17 00:00:00 2001 +From: XiaoDong Huang +Date: Mon, 6 Mar 2017 11:34:41 +0800 +Subject: [PATCH 88/98] soc: rockchip: add virtual poweroff support + +Change-Id: I79240fa936eee3e64eb74eb5d5cdc952c3b2ac9b +Signed-off-by: XiaoDong Huang +--- + drivers/firmware/rockchip_sip.c | 15 ++++ + drivers/soc/rockchip/rockchip_pm_config.c | 92 +++++++++++++++++++++++ + include/linux/rockchip/rockchip_sip.h | 3 + + 3 files changed, 110 insertions(+) + +diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c +index a7f2db58c21c..05b529042003 100644 +--- a/drivers/firmware/rockchip_sip.c ++++ b/drivers/firmware/rockchip_sip.c +@@ -18,6 +18,12 @@ + #include + #include + ++#ifdef CONFIG_64BIT ++#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name ++#else ++#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN_##name ++#endif ++ + #define SIZE_PAGE(n) ((n) << 12) + + static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id, +@@ -59,6 +65,15 @@ int sip_smc_set_suspend_mode(u32 ctrl, + return res.a0; + } + ++int rk_psci_virtual_poweroff(void) ++{ ++ struct arm_smccc_res res; ++ ++ res = __invoke_sip_fn_smc(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), ++ 0, 0, 0); ++ return res.a0; ++} ++ + static u64 ft_fiq_mem_phy; + static void __iomem *ft_fiq_mem_base; + static void (*psci_fiq_debugger_uart_irq_tf)(void *reg_base, u64 sp_el1); +diff --git a/drivers/soc/rockchip/rockchip_pm_config.c b/drivers/soc/rockchip/rockchip_pm_config.c +index a649d6e7f082..ac6d9977697a 100644 +--- a/drivers/soc/rockchip/rockchip_pm_config.c ++++ b/drivers/soc/rockchip/rockchip_pm_config.c +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + + #define PM_INVALID_GPIO 0xffff + +@@ -24,6 +25,90 @@ static const struct of_device_id pm_match_table[] = { + { }, + }; + ++#define MAX_PWRKEY_NUMS 20 ++#define MAX_NUM_KEYS 60 ++ ++struct rkxx_remote_key_table { ++ int scancode; ++ int keycode; ++}; ++ ++static int parse_ir_pwrkeys(unsigned int *pwrkey, int size, int *nkey) ++{ ++ struct device_node *node; ++ struct device_node *child_node; ++ struct rkxx_remote_key_table key_table[MAX_NUM_KEYS]; ++ int i; ++ int len = 0, nbuttons; ++ int num = 0; ++ u32 usercode, scancode; ++ ++ for_each_node_by_name(node, "pwm") { ++ for_each_child_of_node(node, child_node) { ++ if (of_property_read_u32(child_node, ++ "rockchip,usercode", ++ &usercode)) ++ break; ++ ++ if (of_get_property(child_node, ++ "rockchip,key_table", ++ &len) == NULL || ++ len <= 0) ++ break; ++ ++ len = len < sizeof(key_table) ? len : sizeof(key_table); ++ len /= sizeof(u32); ++ if (of_property_read_u32_array(child_node, ++ "rockchip,key_table", ++ (u32 *)key_table, ++ len)) ++ break; ++ ++ nbuttons = len / 2; ++ for (i = 0; i < nbuttons && num < size; ++i) { ++ if (key_table[i].keycode == KEY_POWER) { ++ scancode = key_table[i].scancode; ++ pr_debug("usercode=%x, key=%x\n", ++ usercode, scancode); ++ pwrkey[num] = (usercode & 0xffff) << 16; ++ pwrkey[num] |= (scancode & 0xff) << 8; ++ ++num; ++ } ++ } ++ } ++ } ++ ++ *nkey = num; ++ ++ return num ? 0 : -1; ++} ++ ++static void rockchip_pm_virt_pwroff_prepare(void) ++{ ++ int error; ++ int i, nkey; ++ u32 power_key[MAX_PWRKEY_NUMS]; ++ ++ if ((parse_ir_pwrkeys(power_key, ARRAY_SIZE(power_key), &nkey))) { ++ pr_err("Parse ir powerkey code failed!\n"); ++ return; ++ } ++ ++ for (i = 0; i < nkey; ++i) ++ sip_smc_set_suspend_mode(VIRTUAL_POWEROFF, 1, power_key[i]); ++ ++ regulator_suspend_prepare(PM_SUSPEND_MEM); ++ ++ error = disable_nonboot_cpus(); ++ if (error) { ++ pr_err("Disable nonboot cpus failed!\n"); ++ return; ++ } ++ ++ sip_smc_set_suspend_mode(VIRTUAL_POWEROFF, 0, 1); ++ rk_psci_virtual_poweroff(); ++} ++ + static int __init pm_config_init(struct platform_device *pdev) + { + const struct of_device_id *match_id; +@@ -34,6 +119,7 @@ static int __init pm_config_init(struct platform_device *pdev) + int gpio_temp[10]; + u32 sleep_debug_en = 0; + u32 apios_suspend = 0; ++ u32 virtual_poweroff_en = 0; + enum of_gpio_flags flags; + int i = 0; + int length; +@@ -103,6 +189,12 @@ static int __init pm_config_init(struct platform_device *pdev) + apios_suspend, + 0); + ++ if (!of_property_read_u32_array(node, ++ "rockchip,virtual-poweroff", ++ &virtual_poweroff_en, 1) && ++ virtual_poweroff_en) ++ pm_power_off_prepare = rockchip_pm_virt_pwroff_prepare; ++ + return 0; + } + +diff --git a/include/linux/rockchip/rockchip_sip.h b/include/linux/rockchip/rockchip_sip.h +index c49e74ae79e5..d695490c8a48 100644 +--- a/include/linux/rockchip/rockchip_sip.h ++++ b/include/linux/rockchip/rockchip_sip.h +@@ -70,12 +70,15 @@ typedef enum { + #define GPIO_POWER_CONFIG 0x04 + #define SUSPEND_DEBUG_ENABLE 0x05 + #define APIOS_SUSPEND_CONFIG 0x06 ++#define VIRTUAL_POWEROFF 0x07 + + /* struct arm_smccc_res: a0: error code; a1~a3: data */ + /* SMC32 Calls */ + int sip_smc_set_suspend_mode(u32 ctrl, + u32 config1, + u32 config2); ++int rk_psci_virtual_poweroff(void); ++ + struct arm_smccc_res sip_smc_get_call_count(void); + struct arm_smccc_res sip_smc_get_atf_version(void); + struct arm_smccc_res sip_smc_get_sip_version(void); +-- +2.25.4 + + +From 4d5dbbfff39cca942b70b22ea6167494fd0f3f50 Mon Sep 17 00:00:00 2001 +From: chenjh +Date: Fri, 17 Mar 2017 16:36:34 +0800 +Subject: [PATCH 89/98] firmware: rockchip: update sip interface + +clean up code and add support for fiq debugger + +Change-Id: I6dc0e4306a8554c49342207191005e55fb662b38 +Signed-off-by: chenjh +--- + drivers/firmware/rockchip_sip.c | 231 +++++++++++++++------- + drivers/soc/rockchip/rockchip_pm_config.c | 2 +- + include/linux/rockchip/rockchip_sip.h | 159 ++++++++++----- + 3 files changed, 266 insertions(+), 126 deletions(-) + +diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c +index 05b529042003..6ed780c587e1 100644 +--- a/drivers/firmware/rockchip_sip.c ++++ b/drivers/firmware/rockchip_sip.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + + #ifdef CONFIG_64BIT + #define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name +@@ -37,137 +38,225 @@ static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id, + return res; + } + +-struct arm_smccc_res sip_smc_ddr_cfg(u32 arg0, u32 arg1, +- u32 arg2) ++struct arm_smccc_res sip_smc_ddr_cfg(u32 arg0, u32 arg1, u32 arg2) + { +- return __invoke_sip_fn_smc(SIP_DDR_CFG32, arg0, arg1, arg2); ++ return __invoke_sip_fn_smc(SIP_DDR_CFG, arg0, arg1, arg2); + } + + struct arm_smccc_res sip_smc_get_atf_version(void) + { +- return __invoke_sip_fn_smc(SIP_ATF_VERSION32, 0, 0, 0); ++ return __invoke_sip_fn_smc(SIP_ATF_VERSION, 0, 0, 0); + } + + struct arm_smccc_res sip_smc_get_sip_version(void) + { +- return __invoke_sip_fn_smc(SIP_SIP_VERSION32, 0, 0, 0); ++ return __invoke_sip_fn_smc(SIP_SIP_VERSION, 0, 0, 0); + } + +-int sip_smc_set_suspend_mode(u32 ctrl, +- u32 config1, +- u32 config2) ++int sip_smc_set_suspend_mode(u32 ctrl, u32 config1, u32 config2) + { + struct arm_smccc_res res; + +- res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE32, ctrl, +- config1, config2); +- ++ res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, ctrl, config1, config2); + return res.a0; + } + +-int rk_psci_virtual_poweroff(void) ++int sip_smc_virtual_poweroff(void) + { + struct arm_smccc_res res; + +- res = __invoke_sip_fn_smc(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), +- 0, 0, 0); ++ res = __invoke_sip_fn_smc(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), 0, 0, 0); + return res.a0; + } + +-static u64 ft_fiq_mem_phy; +-static void __iomem *ft_fiq_mem_base; +-static void (*psci_fiq_debugger_uart_irq_tf)(void *reg_base, u64 sp_el1); +-static u32 fig_init_flag; +- +-u32 rockchip_psci_smc_get_tf_ver(void) ++struct arm_smccc_res sip_smc_request_share_mem(u32 page_num, ++ share_page_type_t page_type) + { + struct arm_smccc_res res; ++ unsigned long share_mem_phy; ++ ++ res = __invoke_sip_fn_smc(SIP_SHARE_MEM, page_num, page_type, 0); ++ if (IS_SIP_ERROR(res.a0)) ++ goto error; + +- arm_smccc_smc(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); +- return 0x00010005; ++ share_mem_phy = res.a1; ++ res.a1 = (unsigned long)ioremap(share_mem_phy, SIZE_PAGE(page_num)); ++ ++error: ++ return res; + } + +-void psci_fiq_debugger_uart_irq_tf_cb(u64 sp_el1, u64 offset) ++struct arm_smccc_res sip_smc_mcu_el3fiq(u32 arg0, u32 arg1, u32 arg2) + { +- psci_fiq_debugger_uart_irq_tf((char *)ft_fiq_mem_base + offset, sp_el1); +- __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, 0, 0, +- UARTDBG_CFG_OSHDL_TO_OS); ++ return __invoke_sip_fn_smc(SIP_MCU_EL3FIQ_CFG, arg0, arg1, arg2); + } + +-void psci_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback) ++/************************** fiq debugger **************************************/ ++#ifdef CONFIG_ARM64 ++#define SIP_UARTDBG_FN SIP_UARTDBG_CFG64 ++#else ++#define SIP_UARTDBG_FN SIP_UARTDBG_CFG ++#endif ++ ++static int fiq_sip_enabled; ++static int fiq_target_cpu; ++static phys_addr_t ft_fiq_mem_phy; ++static void __iomem *ft_fiq_mem_base; ++static void (*sip_fiq_debugger_uart_irq_tf)(struct pt_regs _pt_regs, ++ unsigned long cpu); ++int sip_fiq_debugger_is_enabled(void) ++{ ++ return fiq_sip_enabled; ++} ++ ++static struct pt_regs sip_fiq_debugger_get_pt_regs(void *reg_base, ++ unsigned long sp_el1) + { +- struct arm_smccc_res sip_smmc; ++ struct pt_regs fiq_pt_regs; ++ ++#ifdef CONFIG_ARM64 ++ /* copy cpu context */ ++ memcpy(&fiq_pt_regs, reg_base, 8 * 31); ++ ++ /* copy pstate */ ++ memcpy(&fiq_pt_regs.pstate, reg_base + 0x110, 8); ++ ++ /* EL1 mode */ ++ if (fiq_pt_regs.pstate & 0x10) ++ memcpy(&fiq_pt_regs.sp, reg_base + 0xf8, 8); ++ /* EL0 mode */ ++ else ++ fiq_pt_regs.sp = sp_el1; ++ ++ /* copy pc */ ++ memcpy(&fiq_pt_regs.pc, reg_base + 0x118, 8); ++#else ++ struct sm_nsec_ctx *nsec_ctx = reg_base; ++ ++ fiq_pt_regs.ARM_r0 = nsec_ctx->r0; ++ fiq_pt_regs.ARM_r1 = nsec_ctx->r1; ++ fiq_pt_regs.ARM_r2 = nsec_ctx->r2; ++ fiq_pt_regs.ARM_r3 = nsec_ctx->r3; ++ fiq_pt_regs.ARM_r4 = nsec_ctx->r4; ++ fiq_pt_regs.ARM_r5 = nsec_ctx->r5; ++ fiq_pt_regs.ARM_r6 = nsec_ctx->r6; ++ fiq_pt_regs.ARM_r7 = nsec_ctx->r7; ++ fiq_pt_regs.ARM_r8 = nsec_ctx->r8; ++ fiq_pt_regs.ARM_r9 = nsec_ctx->r9; ++ fiq_pt_regs.ARM_r10 = nsec_ctx->r10; ++ fiq_pt_regs.ARM_fp = nsec_ctx->r11; ++ fiq_pt_regs.ARM_ip = nsec_ctx->r12; ++ fiq_pt_regs.ARM_sp = nsec_ctx->svc_sp; ++ fiq_pt_regs.ARM_lr = nsec_ctx->svc_lr; ++ fiq_pt_regs.ARM_pc = nsec_ctx->mon_lr; ++ fiq_pt_regs.ARM_cpsr = nsec_ctx->mon_spsr; ++#endif + +- psci_fiq_debugger_uart_irq_tf = callback; +- sip_smmc = __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, irq_id, +- (u64)psci_fiq_debugger_uart_irq_tf_cb, +- UARTDBG_CFG_INIT); +- ft_fiq_mem_phy = sip_smmc.a0; +- ft_fiq_mem_base = ioremap(ft_fiq_mem_phy, 8 * 1024); +- fig_init_flag = 1; ++ return fiq_pt_regs; + } + +-void psci_enable_fiq(void) ++static void sip_fiq_debugger_uart_irq_tf_cb(unsigned long sp_el1, ++ unsigned long offset, ++ unsigned long cpu) + { +- int irq_flag; +- int cpu_id; ++ struct pt_regs fiq_pt_regs; ++ char *cpu_context; ++ ++ /* calling fiq handler */ ++ if (ft_fiq_mem_base) { ++ cpu_context = (char *)ft_fiq_mem_base + offset; ++ fiq_pt_regs = sip_fiq_debugger_get_pt_regs(cpu_context, sp_el1); ++ sip_fiq_debugger_uart_irq_tf(fiq_pt_regs, cpu); ++ } ++ ++ /* fiq handler done, return to EL3(then EL3 return to EL1 entry) */ ++ __invoke_sip_fn_smc(SIP_UARTDBG_FN, 0, 0, UARTDBG_CFG_OSHDL_TO_OS); ++} + +- if (fig_init_flag != 1) +- return; +- irq_flag = *((char *)(ft_fiq_mem_base) + 8 * 1024 - 0x04); ++int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback_fn) ++{ ++ struct arm_smccc_res res; + +- cpu_id = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; +- if ((irq_flag == 0xAA) && (cpu_id == 0)) +- __invoke_sip_fn_smc(RK_SIP_ENABLE_FIQ, 0, 0, 0); ++ fiq_target_cpu = 0; ++ ++ /* init fiq debugger callback */ ++ sip_fiq_debugger_uart_irq_tf = callback_fn; ++ res = __invoke_sip_fn_smc(SIP_UARTDBG_FN, irq_id, ++ (unsigned long)sip_fiq_debugger_uart_irq_tf_cb, ++ UARTDBG_CFG_INIT); ++ if (IS_SIP_ERROR(res.a0)) { ++ pr_err("%s error: %d\n", __func__, (int)res.a0); ++ return res.a0; ++ } ++ ++ /* share memory ioremap */ ++ if (!ft_fiq_mem_base) { ++ ft_fiq_mem_phy = res.a1; ++ ft_fiq_mem_base = ioremap(ft_fiq_mem_phy, ++ FIQ_UARTDBG_SHARE_MEM_SIZE); ++ if (!ft_fiq_mem_base) { ++ pr_err("%s: share memory ioremap failed\n", __func__); ++ return -ENOMEM; ++ } ++ } ++ ++ fiq_sip_enabled = 1; ++ ++ return SIP_RET_SUCCESS; + } + +-u32 psci_fiq_debugger_switch_cpu(u32 cpu) ++int sip_fiq_debugger_switch_cpu(u32 cpu) + { +- struct arm_smccc_res sip_smmc; ++ struct arm_smccc_res res; + +- sip_smmc = __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, +- cpu_logical_map(cpu), +- 0, UARTDBG_CFG_OSHDL_CPUSW); +- return sip_smmc.a0; ++ fiq_target_cpu = cpu; ++ res = __invoke_sip_fn_smc(SIP_UARTDBG_FN, cpu_logical_map(cpu), ++ 0, UARTDBG_CFG_OSHDL_CPUSW); ++ return res.a0; + } + +-void psci_fiq_debugger_enable_debug(bool val) ++void sip_fiq_debugger_enable_debug(bool enable) + { +- if (val) +- __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, 0, +- 0, UARTDBG_CFG_OSHDL_DEBUG_ENABLE); +- else +- __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, 0, +- 0, UARTDBG_CFG_OSHDL_DEBUG_DISABLE); ++ unsigned long val; ++ ++ val = enable ? UARTDBG_CFG_OSHDL_DEBUG_ENABLE : ++ UARTDBG_CFG_OSHDL_DEBUG_DISABLE; ++ ++ __invoke_sip_fn_smc(SIP_UARTDBG_FN, 0, 0, val); + } + +-int psci_fiq_debugger_set_print_port(u32 port, u32 baudrate) ++int sip_fiq_debugger_set_print_port(u32 port_phyaddr, u32 baudrate) + { + struct arm_smccc_res res; + +- res = __invoke_sip_fn_smc(PSCI_SIP_UARTDBG_CFG64, port, baudrate, ++ res = __invoke_sip_fn_smc(SIP_UARTDBG_FN, port_phyaddr, baudrate, + UARTDBG_CFG_PRINT_PORT); + return res.a0; + } + +-struct arm_smccc_res sip_smc_get_share_mem_page(u32 page_num, +- share_page_type_t page_type) ++int sip_fiq_debugger_request_share_memory(void) + { + struct arm_smccc_res res; +- unsigned long share_mem_phy; + +- res = __invoke_sip_fn_smc(SIP_SHARE_MEM32, page_num, page_type, 0); +- if (res.a0) +- goto error; ++ /* request page share memory */ ++ res = sip_smc_request_share_mem(FIQ_UARTDBG_PAGE_NUMS, ++ SHARE_PAGE_TYPE_UARTDBG); ++ if (IS_SIP_ERROR(res.a0)) ++ return res.a0; + +- share_mem_phy = res.a1; +- res.a1 = (unsigned long)ioremap(share_mem_phy, SIZE_PAGE(page_num)); ++ return SIP_RET_SUCCESS; ++} + +-error: +- return res; ++int sip_fiq_debugger_get_target_cpu(void) ++{ ++ return fiq_target_cpu; + } + +-struct arm_smccc_res sip_smc_get_call_count(void) ++void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu) + { +- return __invoke_sip_fn_smc(SIP_SVC_CALL_COUNT, 0, 0, 0); ++ u32 en; ++ ++ fiq_target_cpu = tgt_cpu; ++ en = enable ? UARTDBG_CFG_FIQ_ENABEL : UARTDBG_CFG_FIQ_DISABEL; ++ __invoke_sip_fn_smc(SIP_UARTDBG_FN, tgt_cpu, 0, en); + } +diff --git a/drivers/soc/rockchip/rockchip_pm_config.c b/drivers/soc/rockchip/rockchip_pm_config.c +index ac6d9977697a..43b2e0f33343 100644 +--- a/drivers/soc/rockchip/rockchip_pm_config.c ++++ b/drivers/soc/rockchip/rockchip_pm_config.c +@@ -106,7 +106,7 @@ static void rockchip_pm_virt_pwroff_prepare(void) + } + + sip_smc_set_suspend_mode(VIRTUAL_POWEROFF, 0, 1); +- rk_psci_virtual_poweroff(); ++ sip_smc_virtual_poweroff(); + } + + static int __init pm_config_init(struct platform_device *pdev) +diff --git a/include/linux/rockchip/rockchip_sip.h b/include/linux/rockchip/rockchip_sip.h +index d695490c8a48..b19f64ede981 100644 +--- a/include/linux/rockchip/rockchip_sip.h ++++ b/include/linux/rockchip/rockchip_sip.h +@@ -15,55 +15,55 @@ + #include + #include + +-/* SMC function IDs for SiP Service queries */ +-#define SIP_SVC_CALL_COUNT 0x8200ff00 +-#define SIP_SVC_UID 0x8200ff01 +-#define SIP_SVC_VERSION 0x8200ff03 ++/* SMC function IDs for SiP Service queries, compatible with kernel-3.10 */ ++#define SIP_ATF_VERSION 0x82000001 ++#define SIP_ACCESS_REG 0x82000002 ++#define SIP_SUSPEND_MODE 0x82000003 ++#define SIP_PENDING_CPUS 0x82000004 ++#define SIP_UARTDBG_CFG 0x82000005 ++#define SIP_UARTDBG_CFG64 0xc2000005 ++#define SIP_MCU_EL3FIQ_CFG 0x82000006 ++#define SIP_ACCESS_CHIP_STATE64 0xc2000006 ++#define SIP_SECURE_MEM_CONFIG 0x82000007 ++#define SIP_ACCESS_CHIP_EXTRA_STATE64 0xc2000007 ++#define SIP_DDR_CFG 0x82000008 ++#define SIP_SHARE_MEM 0x82000009 ++#define SIP_SIP_VERSION 0x8200000a ++#define SIP_REMOTECTL_CFG 0x8200000b + +-#define SIP_ATF_VERSION32 0x82000001 +-#define SIP_SUSPEND_MODE32 0x82000003 +-#define SIP_DDR_CFG32 0x82000008 +-#define SIP_SHARE_MEM32 0x82000009 +-#define SIP_SIP_VERSION32 0x8200000a ++/* Trust firmware version */ ++#define ATF_VER_MAJOR(ver) (((ver) >> 16) & 0xffff) ++#define ATF_VER_MINOR(ver) (((ver) >> 0) & 0xffff) + +-/* Share mem page types */ +-typedef enum { +- SHARE_PAGE_TYPE_INVALID = 0, +- SHARE_PAGE_TYPE_UARTDBG, +- SHARE_PAGE_TYPE_MAX, +-} share_page_type_t; ++/* SIP_ACCESS_REG: read or write */ ++#define SECURE_REG_RD 0x0 ++#define SECURE_REG_WR 0x1 + +-/* Error return code */ +-#define SIP_RET_SUCCESS 0 +-#define SIP_RET_NOT_SUPPORTED -1 +-#define SIP_RET_INVALID_PARAMS -2 +-#define SIP_RET_INVALID_ADDRESS -3 +-#define SIP_RET_DENIED -4 +-#define SIP_RET_SMC_UNKNOWN 0xffffffff ++/* Fiq debugger share memory: 8KB enough */ ++#define FIQ_UARTDBG_PAGE_NUMS 2 ++#define FIQ_UARTDBG_SHARE_MEM_SIZE ((FIQ_UARTDBG_PAGE_NUMS) * 4096) + +-/* Sip version */ +-#define SIP_IMPLEMENT_V1 (1) +-#define SIP_IMPLEMENT_V2 (2) ++/* Error return code */ ++#define IS_SIP_ERROR(x) (!!(x)) + +-#define RK_SIP_DISABLE_FIQ 0xc2000006 +-#define RK_SIP_ENABLE_FIQ 0xc2000007 +-#define PSCI_SIP_RKTF_VER 0x82000001 +-#define PSCI_SIP_ACCESS_REG 0x82000002 +-#define PSCI_SIP_ACCESS_REG64 0xc2000002 +-#define PSCI_SIP_SUSPEND_WR_CTRBITS 0x82000003 +-#define PSCI_SIP_PENDING_CPUS 0x82000004 +-#define PSCI_SIP_UARTDBG_CFG 0x82000005 +-#define PSCI_SIP_UARTDBG_CFG64 0xc2000005 +-#define PSCI_SIP_EL3FIQ_CFG 0x82000006 +-#define PSCI_SIP_SMEM_CONFIG 0x82000007 ++#define SIP_RET_SUCCESS 0 ++#define SIP_RET_SMC_UNKNOWN -1 ++#define SIP_RET_NOT_SUPPORTED -2 ++#define SIP_RET_INVALID_PARAMS -3 ++#define SIP_RET_INVALID_ADDRESS -4 ++#define SIP_RET_DENIED -5 + ++/* SIP_UARTDBG_CFG64 call types */ + #define UARTDBG_CFG_INIT 0xf0 + #define UARTDBG_CFG_OSHDL_TO_OS 0xf1 + #define UARTDBG_CFG_OSHDL_CPUSW 0xf3 + #define UARTDBG_CFG_OSHDL_DEBUG_ENABLE 0xf4 + #define UARTDBG_CFG_OSHDL_DEBUG_DISABLE 0xf5 + #define UARTDBG_CFG_PRINT_PORT 0xf7 ++#define UARTDBG_CFG_FIQ_ENABEL 0xf8 ++#define UARTDBG_CFG_FIQ_DISABEL 0xf9 + ++/* SIP_SUSPEND_MODE32 call types */ + #define SUSPEND_MODE_CONFIG 0x01 + #define WKUP_SOURCE_CONFIG 0x02 + #define PWM_REGULATOR_CONFIG 0x03 +@@ -72,27 +72,78 @@ typedef enum { + #define APIOS_SUSPEND_CONFIG 0x06 + #define VIRTUAL_POWEROFF 0x07 + +-/* struct arm_smccc_res: a0: error code; a1~a3: data */ +-/* SMC32 Calls */ +-int sip_smc_set_suspend_mode(u32 ctrl, +- u32 config1, +- u32 config2); +-int rk_psci_virtual_poweroff(void); ++/* SIP_REMOTECTL_CFG call types */ ++#define REMOTECTL_SET_IRQ 0xf0 ++#define REMOTECTL_SET_PWM_CH 0xf1 ++#define REMOTECTL_SET_PWRKEY 0xf2 ++#define REMOTECTL_GET_WAKEUP_STATE 0xf3 ++#define REMOTECTL_ENABLE 0xf4 ++/* wakeup state */ ++#define REMOTECTL_PWRKEY_WAKEUP 0xdeadbeaf + +-struct arm_smccc_res sip_smc_get_call_count(void); ++/* Share mem page types */ ++typedef enum { ++ SHARE_PAGE_TYPE_INVALID = 0, ++ SHARE_PAGE_TYPE_UARTDBG, ++ SHARE_PAGE_TYPE_MAX, ++} share_page_type_t; ++ ++/* ++ * Rules: struct arm_smccc_res contains result and data, details: ++ * ++ * a0: error code(0: success, !0: error); ++ * a1~a3: data ++ */ + struct arm_smccc_res sip_smc_get_atf_version(void); + struct arm_smccc_res sip_smc_get_sip_version(void); +-struct arm_smccc_res sip_smc_ddr_cfg(u32 arg0, u32 arg1, +- u32 arg2); +-struct arm_smccc_res sip_smc_get_share_mem_page(u32 page_num, +- share_page_type_t page_type); ++struct arm_smccc_res sip_smc_ddr_cfg(u32 arg0, u32 arg1, u32 arg2); ++struct arm_smccc_res sip_smc_request_share_mem(u32 page_num, ++ share_page_type_t page_type); ++struct arm_smccc_res sip_smc_mcu_el3fiq(u32 arg0, u32 arg1, u32 arg2); ++ ++int sip_smc_set_suspend_mode(u32 ctrl, u32 config1, u32 config2); ++int sip_smc_virtual_poweroff(void); ++/***************************fiq debugger **************************************/ ++void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu); ++void sip_fiq_debugger_enable_debug(bool enable); ++int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback_fn); ++int sip_fiq_debugger_set_print_port(u32 port_phyaddr, u32 baudrate); ++int sip_fiq_debugger_request_share_memory(void); ++int sip_fiq_debugger_get_target_cpu(void); ++int sip_fiq_debugger_switch_cpu(u32 cpu); ++int sip_fiq_debugger_is_enabled(void); + +-void psci_enable_fiq(void); +-u32 rockchip_psci_smc_get_tf_ver(void); +-void psci_fiq_debugger_uart_irq_tf_cb(u64 sp_el1, u64 offset); +-void psci_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback); +-u32 psci_fiq_debugger_switch_cpu(u32 cpu); +-void psci_fiq_debugger_enable_debug(bool val); +-int psci_fiq_debugger_set_print_port(u32 port, u32 baudrate); ++/* optee cpu_context */ ++struct sm_nsec_ctx { ++ u32 usr_sp; ++ u32 usr_lr; ++ u32 irq_spsr; ++ u32 irq_sp; ++ u32 irq_lr; ++ u32 svc_spsr; ++ u32 svc_sp; ++ u32 svc_lr; ++ u32 abt_spsr; ++ u32 abt_sp; ++ u32 abt_lr; ++ u32 und_spsr; ++ u32 und_sp; ++ u32 und_lr; ++ u32 mon_lr; ++ u32 mon_spsr; ++ u32 r4; ++ u32 r5; ++ u32 r6; ++ u32 r7; ++ u32 r8; ++ u32 r9; ++ u32 r10; ++ u32 r11; ++ u32 r12; ++ u32 r0; ++ u32 r1; ++ u32 r2; ++ u32 r3; ++}; + + #endif +-- +2.25.4 + + +From 339166e78994a13b673633cbae50d2b0d70f2919 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sun, 9 Feb 2020 02:23:06 +0100 +Subject: [PATCH 90/98] arm64/dts: Add suspend node to rk3399 + +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index cede1ad81be2..2dd59db2033e 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + #include + + / { +@@ -2651,4 +2652,27 @@ + }; + + }; ++ ++ rockchip_suspend: rockchip-suspend { ++ compatible = "rockchip,pm-rk3399"; ++ status = "disabled"; ++ rockchip,sleep-debug-en = <0>; ++ rockchip,virtual-poweroff = <0>; ++ rockchip,sleep-mode-config = < ++ (0 ++ | RKPM_SLP_ARMPD ++ | RKPM_SLP_PERILPPD ++ | RKPM_SLP_DDR_RET ++ | RKPM_SLP_PLLPD ++ | RKPM_SLP_OSC_DIS ++ | RKPM_SLP_CENTER_PD ++ | RKPM_SLP_AP_PWROFF ++ ) ++ >; ++ rockchip,wakeup-config = < ++ (0 ++ | RKPM_GPIO_WKUP_EN ++ ) ++ >; ++ }; + }; +-- +2.25.4 + + +From 2725a9bbd8618d25835119c7fa88511956a21a23 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sun, 9 Feb 2020 02:24:50 +0100 +Subject: [PATCH 91/98] arm64/dts: Add MMIO SRAM emulation for ATF controller + +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index b0363a2554b7..c4b52e674311 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -17,6 +17,13 @@ + model = "Pine64 Pinebook Pro"; + compatible = "pine64,pinebook-pro", "rockchip,rk3399"; + ++ /* first 128k(0xff8d0000~0xff8f0000) for ddr and suspend */ ++ iram: sram@ff8d0000 { ++ compatible = "mmio-sram"; ++ reg = <0x0 0xff8d0000 0x0 0x20000>; /* 128k */ ++ }; ++ ++ + edp_panel: edp-panel { + compatible = "boe,nv140fhmn49", "simple-panel"; + backlight = <&backlight>; +-- +2.25.4 + + +From 1891314a06d5b1ce88c1a5565606574cbf378180 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sun, 9 Feb 2020 02:26:19 +0100 +Subject: [PATCH 92/98] arm64/dts: Add suspend configuration to Pinebook Pro + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 23 +++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index c4b52e674311..20c7e5abe037 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -1236,3 +1236,26 @@ + }; + }; + }; ++ ++&rockchip_suspend { ++ status = "okay"; ++ rockchip,sleep-debug-en = <1>; ++ rockchip,sleep-mode-config = < ++ (0 ++ | RKPM_SLP_ARMPD ++ | RKPM_SLP_PERILPPD ++ | RKPM_SLP_DDR_RET ++ | RKPM_SLP_PLLPD ++ | RKPM_SLP_CENTER_PD ++ | RKPM_SLP_AP_PWROFF ++ ) ++ >; ++ rockchip,pwm-regulator-config = < ++ (0 ++ | PWM2_REGULATOR_EN ++ ) ++ >; ++ rockchip,power-ctrl = ++ <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>, ++ <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; ++}; +-- +2.25.4 + + +From 9739ce68d82aa98bbb18b25a0f25115853507c0c Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sun, 9 Feb 2020 02:35:49 +0100 +Subject: [PATCH 93/98] Revert "arm64/dts: Default to s2idle sleep" + +This reverts commit d71a774aee61d67970d53077ef59be29035b1c90. + +S3 seems to be working properly now +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 20c7e5abe037..8b50869255bb 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -47,7 +47,7 @@ + }; + + chosen { +- bootargs = "earlycon=uart8250,mmio32,0xff1a0000 mem_sleep_default=s2idle"; ++ bootargs = "earlycon=uart8250,mmio32,0xff1a0000"; + stdout-path = "serial2:1500000n8"; + }; + +-- +2.25.4 + + +From 94939a47575fc83e727d5637fcc02d35b16398b1 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sun, 9 Feb 2020 18:06:27 +0100 +Subject: [PATCH 94/98] arm64/config: Enable suspend SIP signaling + +--- + arch/arm64/configs/pinebook_pro_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig +index ddd73a27a2b5..6fd465d24ee7 100644 +--- a/arch/arm64/configs/pinebook_pro_defconfig ++++ b/arch/arm64/configs/pinebook_pro_defconfig +@@ -71,6 +71,7 @@ CONFIG_ACPI_CPPC_CPUFREQ=y + CONFIG_ARM_SCPI_CPUFREQ=y + CONFIG_ARM_SCPI_PROTOCOL=y + CONFIG_DMI_SYSFS=y ++CONFIG_ROCKCHIP_SIP=y + CONFIG_EFI_VARS=y + CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y + # CONFIG_EFI_ARMSTUB_DTB_LOADER is not set +@@ -2464,6 +2465,7 @@ CONFIG_REMOTEPROC=y + CONFIG_RPMSG_CHAR=y + CONFIG_RPMSG_QCOM_GLINK_RPM=y + CONFIG_ROCKCHIP_PM_DOMAINS=y ++CONFIG_ROCKCHIP_SUSPEND_MODE=y + CONFIG_DEVFREQ_GOV_PERFORMANCE=y + CONFIG_ARM_RK3399_DMC_DEVFREQ=y + CONFIG_EXTCON_ADC_JACK=m +-- +2.25.4 + + +From 0729f3ddf0b868f0e9b76d09cef3865bf34b0687 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Sun, 9 Feb 2020 23:08:02 +0100 +Subject: [PATCH 95/98] arm64/dts: Add PCIe 1.8 V and 0.9 V regulators + +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 8b50869255bb..5a0374c8e712 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -410,6 +410,20 @@ + }; + }; + ++ /* Regualtors supplied by vcc_1v8 */ ++ /* Primary 0.9 V LDO */ ++ vcca0v9_s3: vcca0v9-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc0v9_s3"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ + mains_charger: dc-charger { + compatible = "gpio-charger"; + charger-type = "mains"; +@@ -871,6 +885,8 @@ + max-link-speed = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; ++ vpcie0v9-supply = <&vcca0v9_s3>; ++ vpcie1v8-supply = <&vcca1v8_s3>; + vpcie3v3-supply = <&vcc3v3_ssd>; + bus-scan-delay-ms = <1000>; + status = "okay"; +-- +2.25.4 + + +From 9c02afce73405957d349c2d0780c539687f99a22 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Mon, 10 Feb 2020 00:00:19 +0100 +Subject: [PATCH 96/98] regulator/core: Add generic suspend support for + regulators + +Add a generic suspend/resume handler for regulators that lack +suspend/resume support +--- + drivers/regulator/core.c | 48 +++++++++++++++++++++++++++++--- + include/linux/regulator/driver.h | 3 ++ + 2 files changed, 47 insertions(+), 4 deletions(-) + +diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c +index a46be221dbdc..34a1cfa325a9 100644 +--- a/drivers/regulator/core.c ++++ b/drivers/regulator/core.c +@@ -5248,6 +5248,14 @@ void regulator_unregister(struct regulator_dev *rdev) + EXPORT_SYMBOL_GPL(regulator_unregister); + + #ifdef CONFIG_SUSPEND ++static inline int can_enable(struct regulator_dev *rdev) { ++ return rdev->ena_pin || rdev->desc->ops->enable; ++} ++ ++static inline int can_disable(struct regulator_dev *rdev) { ++ return rdev->ena_pin || rdev->desc->ops->disable; ++} ++ + /** + * regulator_suspend - prepare regulators for system wide suspend + * @dev: ``&struct device`` pointer that is passed to _regulator_suspend() +@@ -5258,10 +5266,33 @@ static int regulator_suspend(struct device *dev) + { + struct regulator_dev *rdev = dev_to_rdev(dev); + suspend_state_t state = pm_suspend_target_state; ++ struct regulator_state *rstate; + int ret; + + regulator_lock(rdev); + ret = suspend_set_state(rdev, state); ++ if (ret) { ++ goto out; ++ } ++ ++ rstate = regulator_get_suspend_state(rdev, state); ++ if (rstate == NULL) ++ goto out; ++ ++ if (rstate->enabled == ENABLE_IN_SUSPEND && can_enable(rdev)) { ++ if (!rdev->desc->ops->set_suspend_enable) { ++ rdev->resume_state = _regulator_is_enabled(rdev); ++ rdev_info(rdev, "Entering suspend %d, enabling forcibly, was %s\n", state, rdev->resume_state ? "on" : "off"); ++ ret = _regulator_do_enable(rdev); ++ } ++ } else if (rstate->enabled == DISABLE_IN_SUSPEND && can_disable(rdev)) { ++ if (!rdev->desc->ops->set_suspend_disable) { ++ rdev->resume_state = _regulator_is_enabled(rdev); ++ rdev_info(rdev, "Entering suspend %d, disabling forcibly, was %s\n", state, rdev->resume_state ? "on" : "off"); ++ ret = _regulator_do_disable(rdev); ++ } ++ } ++out: + regulator_unlock(rdev); + + return ret; +@@ -5280,10 +5311,19 @@ static int regulator_resume(struct device *dev) + + regulator_lock(rdev); + +- if (rdev->desc->ops->resume && +- (rstate->enabled == ENABLE_IN_SUSPEND || +- rstate->enabled == DISABLE_IN_SUSPEND)) +- ret = rdev->desc->ops->resume(rdev); ++ if (rstate->enabled == ENABLE_IN_SUSPEND || rstate->enabled == DISABLE_IN_SUSPEND) { ++ if (rdev->desc->ops->resume) { ++ ret = rdev->desc->ops->resume(rdev); ++ } else if ((rstate->enabled == ENABLE_IN_SUSPEND && !rdev->desc->ops->set_suspend_enable) || ++ (rstate->enabled == DISABLE_IN_SUSPEND && !rdev->desc->ops->set_suspend_disable)) { ++ rdev_info(rdev, "Resuming, restoring state to %s\n", rdev->resume_state ? "on" : "off"); ++ if (rdev->resume_state && can_enable(rdev)) { ++ ret = _regulator_do_enable(rdev); ++ } else if (!rdev->resume_state && can_disable(rdev)) { ++ ret = _regulator_do_disable(rdev); ++ } ++ } ++ } + + regulator_unlock(rdev); + +diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h +index 9a911bb5fb61..146fb5e8fc6e 100644 +--- a/include/linux/regulator/driver.h ++++ b/include/linux/regulator/driver.h +@@ -482,6 +482,9 @@ struct regulator_dev { + + /* time when this regulator was disabled last time */ + unsigned long last_off_jiffy; ++ ++ /* state when resuming */ ++ int resume_state; + }; + + struct regulator_dev * +-- +2.25.4 + + +From 28869d9d798ee57aee46cb891a2df723969557cd Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Tue, 11 Feb 2020 16:52:24 +0100 +Subject: [PATCH 97/98] leds/led-core: Honor inversion flag when hardware blink + is available + +--- + drivers/leds/led-core.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/leds/led-core.c b/drivers/leds/led-core.c +index f1f718dbe0f8..f174611e869f 100644 +--- a/drivers/leds/led-core.c ++++ b/drivers/leds/led-core.c +@@ -175,6 +175,7 @@ static void led_blink_setup(struct led_classdev *led_cdev, + unsigned long *delay_off) + { + if (!test_bit(LED_BLINK_ONESHOT, &led_cdev->work_flags) && ++ !test_bit(LED_BLINK_INVERT, &led_cdev->work_flags) && + led_cdev->blink_set && + !led_cdev->blink_set(led_cdev, delay_on, delay_off)) + return; +-- +2.25.4 + diff --git a/overlay.nix b/overlay.nix index 2c1a6ee..af4db7b 100644 --- a/overlay.nix +++ b/overlay.nix @@ -18,6 +18,9 @@ in linux_pinebookpro_latest = callPackage ./kernel/latest { kernelPatches = []; }; linuxPackages_pinebookpro_latest = linuxPackagesFor final.linux_pinebookpro_latest; + linux_pinebookpro_lts = callPackage ./kernel/lts { kernelPatches = []; }; + linuxPackages_pinebookpro_lts = linuxPackagesFor final.linux_pinebookpro_lts; + pinebookpro-firmware = callPackage ./firmware {}; pinebookpro-keyboard-updater = callPackage ./keyboard-updater {}; }